FPGA-based packets processing acceleration platform for VNF

FPGA-based packets processing acceleration platform for VNF
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基于 FPGA 的 VNF 数据包处理加速平台

DOI:
10.1109/icsess.2017.8342922
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发表时间:
2017
期刊:
2017 8th IEEE International Conference on Software Engineering and Service Science (ICSESS)
影响因子:
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通讯作者:
Julong Lan
Julong Lan
中科院分区:
--
文献类型:
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作者:
Tianyi Lan;Qing Han;Hongwei Fan;Julong Lan

文献摘要

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尽管在过去的几年中人们一直认为虚拟网络功能(VNF)应构建在通用服务器上,但我们认为它可以导致性能有限,并且较大的上升/下降流量。本文提出了将NFV功能的一部分从软件包转移到常见硬件设备以促进整体性能的新想法。然后,我们介绍PPAP的设计和实现,PPAP是NFV的数据包处理加速平台。通过允许功能控制硬件的处理流,它提供了很高的灵活性。动态匹配表和虚拟化技术可确保在VNF实例之间进行隔离。
While there has been a belief over the past few years that virtual network functions (VNFs) should be built on common servers, we argue that it can lead to limited performance and large up/down traffic. This paper proposes a new idea of shifting part of NFV functions from software packages to common hardware devices to promote overall performance. Then we present the design and implementation of PPAP, a Packets Processing Acceleration Platform for NFV. It offers high flexibility by allowing functions to control the processing flow of hardware. Dynamic match tables and virtualization techniques ensure isolation among VNF instances.