The Model Checking View to Clock Gating and Operand Isolation
The Model Checking View to Clock Gating and Operand Isolation
复制标题
时钟门控和操作数隔离的模型检查视图
DOI：
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发表时间：
2010
期刊：
影响因子：
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通讯作者：
S. Shukla
中科院分区：
文献类型：
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作者：
J. Brandt;K. Schneider;Sumit Ahuja;S. Shukla
时钟门控和操作数隔离是两种在最先进的硬件设计中降低功耗的技术。这两种方法基本上都遵循两个步骤：首先，它们静态分析硬件电路以确定不相关的计算。第二，负责这些计算的所有部件都被在平均情况下消耗更少功率的其他部件所取代，或者通过动态门控时钟，或者通过隔离操作数。本文重点研究第一阶段，即无关计算的计算。我们贡献的核心是为每个信号x定义所谓的无源性条件，这表明x当前携带的值对系统的最终结果没有贡献。在展示了我们的理论如何在时钟门控和操作数隔离的背景下普遍使用后，我们对许多最先进的方法进行了分类，并表明它们实际上是我们一般设置的保守近似。因此，它确定了理论基础，采用这些方法在其整体。
Clock gating and operand isolation are two techniques to reduce the power consumption in state-of-the-art hardware designs. Both approaches basically follow a two-step procedure: first, they statically analyze a hardware circuit to determine irrelevant computations. Second, all parts which are responsible for these computations are replaced by others that consume less power in the average case, either by dynamically gating clocks or by isolating operands. This paper focuses on the first phase, i.e. the computation of irrelevant computation. The core of our contribution is the definition of so-called passiveness conditions for each signal x, which indicate that the value currently carried by x does not contribute to the final result of the system. After showing how our theory can be generally used in the context of clock gating and operand isolation, we classify many state-of-the-art approaches and show that they are in fact conservative approximations of our general setting. Thereby, it defines the theoretical basis for adoption of these approaches in their entirety.