An augmented Lagrangian method for VLSI global placement

An augmented Lagrangian method for VLSI global placement
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VLSI全局布局的增强拉格朗日方法

DOI:
10.1007/s11227-014-1113-1
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发表时间:
2014-08
期刊:
The Journal of Supercomputing
影响因子:
--
通讯作者:
Weiguo Li
Weiguo Li
中科院分区:
其他
文献类型:
--
作者:
Wenxing Zhu;Jianli Chen;Weiguo Li

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通过忽略一些单元重叠,全局布局计算每个单元的最佳位置,以最小化线长。布局是超大规模集成电路(VLSI)物理设计中的一个重要阶段,因为电路性能在很大程度上取决于布局结果。在本文中,我们提出了一种增广拉格朗日方法来解决超大规模集成电路的全局布局问题。在该方法中,谨慎的动态密度权重策略被用来平衡线长目标和密度约束,和一个自适应的步长被用来获得运行时间和解决方案的质量之间的折衷。所提出的方法进行测试的IBM混合大小的基准和2006年国际研讨会上的物理设计布局竞赛基准。实验结果表明,我们的全球布局方法优于国家的最先进的布局方法的解决方案质量方面的大多数基准。
By ignoring some cell overlaps, global placement computes the best position for each cell to minimize the wirelength. It is an important stage in very large scale integration (VLSI) physical design, since circuit performance heavily depends on the placement results. In this paper, we propose an augmented Lagrangian method to solve the VLSI global placement problem. In the proposed method, a cautious dynamic density weight strategy is used to balance the wirelength objective and the density constraints, and an adaptive step size is used to obtain a trade-off between runtime and solution quality. The proposed method is tested on the IBM mixed-size benchmarks and the International Symposium on Physical Design 2006 placement contest benchmarks. Experimental results show that our global placement method outperforms the state-of-the-art placement approaches in terms of solution quality on most of the benchmarks.
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