A High-Performance, Reconfigurable, Fully Integrated Time-Domain Reflectometry Architecture Using Digital I/Os

A High-Performance, Reconfigurable, Fully Integrated Time-Domain Reflectometry Architecture Using Digital I/Os
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DOI:
10.1109/tim.2021.3060586
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发表时间:
2021-05
影响因子:
5.6
通讯作者:
Zhenyu Xu;Thomas Mauldin;Zheyi Yao;Gerald Hefferman;Tao Wei
Zhenyu Xu;Thomas Mauldin;Zheyi Yao;Gerald Hefferman;Tao Wei
中科院分区:
工程技术2区
文献类型:
--
作者:
Zhenyu Xu;Thomas Mauldin;Zheyi Yao;Gerald Hefferman;Tao Wei

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时域反射计(TDR)是测量各种波导的阻抗不均匀性的既定手段,提供表征和优化高带宽计算和通信系统的性能所需的关键数据。然而,TDR系统的高空间分辨率(亚厘米)和电压分辨率(亚$\mu \text{V}$)需要评估高性能波导物理大,往往成本高昂,严重限制了他们的效用作为测试平台,并大大限制了他们的使用在表征和故障排除现场硬件。因此,存在对电子上简单、便携且低成本的TDR技术的日益增长的技术需求。TDR系统的接收机在记录反射波波形方面起着关键作用,因此,这样的接收机必须具有高模拟带宽、高采样率和高电压分辨率。然而,使用低成本模数转换器(ADC)难以满足这些要求。本文介绍了一种新的TDR架构,即基于抖动的APC(JAPC),它消除了对外部元件的需要的基础上的替代概念,模拟到概率转换(APC),最近提出的。这些结果表明,一个完全可重构和高度集成的TDR(iTDR)可以实现在现场可编程门阵列(FPGA)芯片上,而不使用任何外部电路元件。使用HDMI电缆作为被测设备(DUT)进行系统的经验评估,并提取DUT的阻抗不均匀性模式(IIP),空间和电压分辨率分别为5 cm和80 μ V。这些结果表明,使用原型的基于JAPC的iTDR的现实世界的波导表征应用的可行性。
Time-domain reflectometry (TDR) is an established means of measuring impedance inhomogeneity of a variety of waveguides, providing critical data necessary to characterize and optimize the performance of high-bandwidth computational and communication systems. However, TDR systems with both the high spatial resolution (sub-cm) and voltage resolution (sub- $\mu \text{V}$ ) required to evaluate high-performance waveguides are physically large and often cost-prohibitive, severely limiting their utility as testing platforms and greatly limiting their use in characterizing and trouble-shooting fielded hardware. Consequently, there exists a growing technical need for an electronically simple, portable, and low-cost TDR technology. The receiver of a TDR system plays a key role in recording reflection waveforms; thus, such a receiver must have high analog bandwidth, high sampling rate, and high-voltage resolution. However, these requirements are difficult to meet using low-cost analog-to-digital converters (ADCs). This article describes a new TDR architecture, namely, jitter-based APC (JAPC), which obviates the need for external components based on an alternative concept, analog-to-probability conversion (APC) that was recently proposed. These results demonstrate that a fully reconfigurable and highly integrated TDR (iTDR) can be implemented on a field-programmable gate array (FPGA) chip without using any external circuit components. Empirical evaluation of the system was conducted using an HDMI cable as the device under test (DUT), and the resulting impedance inhomogeneity pattern (IIP) of the DUT was extracted with spatial and voltage resolutions of 5 cm and $80~ {\mu V}$ , respectively. These results demonstrate the feasibility of using the prototypical JAPC-based iTDR for real-world waveguide characterization applications.