Recovery Scheme to Reduce Latency of Miss-Prediction for Superscalar Processor using L1 Recovery Cache
Recovery Scheme to Reduce Latency of Miss-Prediction for Superscalar Processor using L1 Recovery Cache
复制标题
使用 L1 恢复缓存减少超标量处理器误预测延迟的恢复方案
DOI:
--
复制
发表时间:
2008
期刊:
影响因子:
--
通讯作者:
W. Takahiro
中科院分区:
文献类型:
--
作者:
Jiongyao Ye;W. Takahiro
A branch prediction is indispensable to modern superscalar processors for high performance. Although it has great possibility to improve performance, the advantage may be lost due to miss-prediction. To reduce such a branch miss-prediction penalty, finer recovery mechanisms are needed. One of those mechanisms is a RcB (recovery buffer), which preserves instructions to be restarted when miss-prediction occurs. But RcB cannot recover instructions issued out of order for a superscalar processor. This paper proposes a L1 recovery cache embedded in a superscalar processing, RcC for short, which overcomes weakness of RcB and can recover instructions issued out of order so that recovery penalty is reduced. Our proposed L1 RcC scheme can work supplementing the conventional 1-bit dynamic branch predictor used in a superscalar processor, so that miss-prediction penalty can be effectively reduced.
DOI:
--
发表时间:
2008
期刊:
影响因子:
--
作者:
Tomoyuki Kawamoto;Kazuya Tanigawa;Tetsuo Hironaka;Yuhki Yamabe
通讯作者:
Yuhki Yamabe