Self-reconstruction of mesh-arrays with 1 1/2 -track switches by digital neural circuits

Self-reconstruction of mesh-arrays with 1 1/2 -track switches by digital neural circuits
复制标题

通过数字神经电路对具有 1 1/2 轨道开关的网格阵列进行自重建

DOI:
10.1109/dftvs.1997.628328
复制
发表时间:
1997
期刊:
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
影响因子:
--
通讯作者:
T. Horita
T. Horita
中科院分区:
--
文献类型:
--
作者:
I. Takanami;T. Horita

文献摘要

被引文献

相似文献

之前,我们提出了使用单轨交换机重建网状连接处理器阵列的Hopfield型神经算法,并提到该算法可以通过硬件实现,该算法需要每个处理器元件(PE)有四个神经元,以便在约束下决定故障PE的补偿路径。本文展示了如何通过数字神经电路来实现该算法。它由用于寻找候选补偿路径、决定神经系统是否达到稳定状态以及系统能量最小时的子电路和神经元的子电路组成。每个神经元的子电路只能由 17 个门和两个触发器组成。由于状态转换是并行完成的,电路将能够在小于 1 /spl mu/s 的时间内非常快速地找到故障模式的补偿路径。
Previously, we have proposed the Hopfield-type neural algorithm for reconstructing mesh-connected processor arrays using single-track switches and mentioned that the algorithm could be realized by hardware where the algorithm requires four neurons for each processor element (PE) in order to decide compensation paths for faulty PEs under the constraints. This paper shows how the algorithm can be realized by a digital neural circuit. It consists of subcircuits for finding candidate compensation paths, deciding whether the neural system reaches a stable state and at the time the system energy is minimum, and subcircuits for neurons. The subcircuit for each neuron can only be made with 17 gates and two flip-flops. Since the state transitions are done in parallel, the circuit will be able to find the compensation paths for a fault pattern very quickly within a time less than 1 /spl mu/s.