EOT of 0.62 nm and High Electron Mobility in La-silicate/Si Structure Based nMOSFETs Achieved by Utilizing Metal-Inserted Poly-Si Stacks and Annealing at High Temperature
EOT of 0.62 nm and High Electron Mobility in La-silicate/Si Structure Based nMOSFETs Achieved by Utilizing Metal-Inserted Poly-Si Stacks and Annealing at High Temperature
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DOI:
10.1109/ted.2011.2174442
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发表时间:
2012-02
影响因子:
3.1
通讯作者:
T. Kawanago;Yeonghun Lee;K. Kakushima;P. Ahmet;K. Tsutsui;A. Nishiyama;N. Sugii;K. Natori;T. Hattori;H. Iwai
中科院分区:
文献类型:
--
作者:
T. Kawanago;Yeonghun Lee;K. Kakushima;P. Ahmet;K. Tsutsui;A. Nishiyama;N. Sugii;K. Natori;T. Hattori;H. Iwai
This paper reports on the control of the direct-contact La-silicate/Si interface structure with the aim of achieving scaled equivalent oxide thickness (EOT) and small interface state density. The interface state density at the direct-contact La-silicate/Si interface is found to be reduced to 1.6 × 1011 cm-2eV-1 by annealing at 800 °C for 30 min in forming gas ambient, whereas excess silicate reaction concurrently induced a significant increase in EOT. By utilizing metal-inserted poly-Si (MIPS) stacks and their annealing at high temperature, the increase in EOT is drastically suppressed. At the same time, a superior interfacial property is obtained because the Si layer in the MIPS stacks prevents the excess oxygen diffusion from the atmosphere during the annealing process. As a result, the effective electron mobility of 155 cm2/V·s at 1 MV/cm and an EOT of 0.62 nm are successfully achieved by utilizing direct-contact La-silicate/Si structure. This result is comparable with the recorded effective electron mobility achieved by utilizing Hf-based oxides/Si structure. This demonstrates the advantage of our proposed method to realize the scaled EOT with a superior interfacial property for state-of-the-art metal-oxide-semiconductor field-effect transistors.