Diamond logic inverter with enhancement-mode metal-insulator-semiconductor field effect transistor
Diamond logic inverter with enhancement-mode metal-insulator-semiconductor field effect transistor
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DOI：
10.1063/1.4894291
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发表时间：
2014-08-25
影响因子：
4
通讯作者：
Koide, Y.
中科院分区：
文献类型：
--
作者：
Liu, J. W.;Liao, M. Y.;Koide, Y.
利用增强型氢化金刚石金属-绝缘体-半导体场效应晶体管（MISFET）和负载电阻实现了一种金刚石逻辑反相器。栅极绝缘体具有叠层沉积的LaAlO 3层和薄原子层沉积的Al 2 O 3缓冲层的双层结构。MISFET的源漏电流最大值、非本征漏电流和阈值电压分别为-40.7 mA·mm（-1）、13.2 +/- 0.1 mS·mm（-1）和-3.1 +/- 0.1 V。逻辑反相器显示出明显的反相（非门）的输入电压范围从4.0到-10.0 V的特性。随着负载电阻的增加，逻辑反相器的增益从5.6增加到高达19.4。相对于高和低输入电压的脉冲响应示出了具有低和高输出电压的反转响应。(C)2014 AIP Publishing LLC.
A diamond logic inverter is demonstrated using an enhancement-mode hydrogenated-diamond metal-insulator-semiconductor field effect transistor (MISFET) coupled with a load resistor. The gate insulator has a bilayer structure of a sputtering-deposited LaAlO3 layer and a thin atomic-layer-deposited Al2O3 buffer layer. The source-drain current maximum, extrinsic transconductance, and threshold voltage of the MISFET are measured to be -40.7 mA.mm(-1), 13.2 +/- 0.1 mS.mm(-1), and -3.1 +/- 0.1 V, respectively. The logic inverters show distinct inversion (NOT-gate) characteristics for input voltages ranging from 4.0 to -10.0 V. With increasing the load resistance, the gain of the logic inverter increases from 5.6 to as large as 19.4. The pulse response against the high and low input voltages shows the inversion response with the low and high output voltages. (C) 2014 AIP Publishing LLC.