Just-In-Time Compilation on ARM-A Closer Look at Call-Site Code Consistency

Just-In-Time Compilation on ARM-A Closer Look at Call-Site Code Consistency
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ARM 上的即时编译 - 仔细观察调用站点代码一致性

DOI:
10.1145/3546568
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发表时间:
2022
影响因子:
1.6
通讯作者:
Hartley T
Hartley T
中科院分区:
计算机科学3区
文献类型:
--
作者:
Hartley T

文献摘要

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低功耗Arm架构计算能力的提高使其从传统的便携式电池供电设备领域向数据中心服务器、个人计算机甚至超级计算机领域发展。因此,托管语言(Java,JavaScript等)需要托管运行时环境(MRE)的应用程序需要移植到Arm架构,这需要了解不同的设计权衡。本文研究了低功耗架构中缺乏对自修改代码(SMC)的强大硬件支持(例如,指令高速缓存和数据高速缓存之间的高速缓存一致性的缺乏)影响MRE中的即时(JIT)编译和运行时行为。具体来说,我们专注于实现和治疗的调用网站,必须保持代码的一致性,在面对并发执行和修改重定向控制(修补)的MRE。缺乏一致性,与调用站点可以跳转到的最大距离(范围)相结合,因为与Intel/AMD相比,Arm中的范围更受限制(距离更小)。我们提出了四种不同的强大的实现呼叫网站,并讨论了他们的优点和缺点,在没有强大的硬件支持SMC。最后,我们使用微基准测试评估每种方法,使用三个JVM基准测试套件和开源MaxineVM进一步评估最佳的三种技术,显示性能差异高达12%。基于这些观察,我们建议扩展代码缓存分区策略JIT编译代码,以鼓励更有效的本地分支有限的直接分支范围的架构。
The increase in computational capability of low-power Arm architectures has seen them diversify from their more traditional domain of portable battery powered devices into data center servers, personal computers, and even Supercomputers. Thus, managed languages (Java, Javascript, etc.) that require a managed runtime environment (MRE) need to be ported to the Arm architecture, requiring an understanding of different design tradeoffs.This article studies how the lack of strong hardware support for Self Modifying Code (SMC) in low-power architectures (e.g., absence of cache coherence between instruction cache and data caches), affects Just-In-Time (JIT) compilation and runtime behavior in MREs. Specifically, we focus on the implementation and treatment of call-sites, that must maintain code consistency in the face of concurrent execution and modification to redirect control (patching) by the MRE. The lack of coherence, is compounded with the maximum distance (reach of) a call-site can jump to as the reach is more constrained (smaller distance) in Arm when compared with Intel/AMD. We present four different robust implementations for call-sites and discuss their advantages and disadvantages in the absence of strong hardware support for SMC. Finally, we evaluate each approach using a microbenchmark, further evaluating the best three techniques using three JVM benchmark suites and the open source MaxineVM showcasing performance differences up to 12%. Based on these observations, we propose extending code-cache partitioning strategies for JIT compiled code to encourage more efficient local branching for architectures with limited direct branch ranges.