Separation measurement of parasitic impedance on a power electronics circuit board using TDR

Separation measurement of parasitic impedance on a power electronics circuit board using TDR
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DOI:
10.1109/ecce.2010.5618046
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发表时间:
2010-11
期刊:
2010 IEEE Energy Conversion Congress and Exposition
影响因子:
--
通讯作者:
S. Hashino;Shimizu Toshihisa
S. Hashino;Shimizu Toshihisa
中科院分区:
其他
文献类型:
--
作者:
S. Hashino;Shimizu Toshihisa

文献摘要

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准确识别印刷电路板(PCB)上的寄生参数,建立考虑寄生元件的电力电子电路设计方法,将成为提高电路功率密度的重要技术问题。本研究的重点是时域反射法(TDR),这是一种高速传输技术的有效测量的寄生参数的PCB上的复杂布线安排。利用电路板背面接地层和印刷线路之间的相互作用,可以识别降压斩波器电路板上存在的一些单个寄生电感。然后,本文还讨论了热沉与功率器件之间形成的寄生电容对器件性能的影响。通过实验和仿真结果的比较,验证了寄生电感测量的准确性。
Accurate identification of parasitic parameters on a printed circuit board (PCB) and establishment of a new design method by considering the parasitic components in a power electronics circuit will become major technological issues to promote power density of the circuit. This study focuses on time domain reflectometry (TDR) which is a high-speed transmission technique for the effective measurement of parasitic parameters on PCBs with complicated wiring arrangements. Identify of some individual parasitic inductances existing on a buck chopper PCB can be realized by utilizing an interaction between a reverse-side ground layer and a printed wiring of the PCB. And then, influence of stray capacitances formed between a heat-sink and power devices are mentioned in this paper. The accuracy of the measured parasitic inductances is verified by a comparison of experimental and simulation results.