Low loss, large area 4.5 kV 4H-SiC PIN diodes with reduced forward voltage drift
Low loss, large area 4.5 kV 4H-SiC PIN diodes with reduced forward voltage drift
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低损耗、大面积 4.5 kV 4H-SiC PIN 二极管，可降低正向电压漂移
DOI：
10.1088/0268-1242/24/9/095004
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发表时间：
2009
影响因子：
1.9
通讯作者：
J. Bergman
中科院分区：
文献类型：
--
作者：
P. Brosselard;A. Pérez‐Tomás;J. Hassan;N. Camara;X. Jordà;M. Vellvehí;P. Godignon;J. Millán;J. Bergman
采用梅萨和JTE相结合的方法在Norstel P+/N/N+衬底上制作了4 H-SiC PIN二极管。对于有源面积为2.6 mm 2的器件，在1 µA时测得的击穿电压为4.5 kV。15 A（600 A cm−2）时的差分导通电阻仅为1.7 mΩ cm 2（25 °C），300 °C时为1.9 mΩ cm 2。在300 °C下，对于15 A（500 V）的切换电流，减少的恢复电荷为300 nC。20%的二极管在60小时的直流应力（25-225 °C）后完全没有退化。其他30%的二极管表现出低于1 V的电压漂移降低。对于这些二极管，漏电流在直流应力后保持不受影响。电致发光研究揭示了一个非常低的密度的堆垛层错后，直流应力。制造成品率证明了衬底表面制备和我们的工艺过程的效率。
4H-SiC PIN diodes have been fabricated on a Norstel P+/N/N+ substrate with a combination of Mesa and JTE as edge termination. A breakdown voltage of 4.5 kV has been measured at 1 µA for devices with an active area of 2.6 mm2. The differential on-resistance at 15 A (600 A cm−2) was of only 1.7 mΩ cm2 (25 °C) and 1.9 mΩ cm2 at 300 °C. The reduced recovery charge was of 300 nC for a switched current of 15 A (500 V) at 300 °C. 20% of the diodes showed no degradation at all after 60 h of dc stress (25–225 °C). Other 30% of the diodes exhibit a reduced voltage shift below 1 V. For those diodes, the leakage current remains unaffected after the dc stress. Electroluminescence investigations reveal a very low density of stacking faults after the dc stress. The manufacturing yield evidences the efficiency of the substrate surface preparation and our technological process.