Modeling of high-current source-gated transistors in amorphous silicon
Modeling of high-current source-gated transistors in amorphous silicon
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DOI：
10.1063/1.1865348
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发表时间：
2005-02-14
影响因子：
4
通讯作者：
Sealy, BJ
中科院分区：
文献类型：
--
作者：
Balon, F;Shannon, JM;Sealy, BJ
与场效应晶体管相比，源栅晶体管具有更低的饱和电压和更高的输出阻抗。这些功能进行了研究，使用计算机建模的非晶硅晶体管在高电流时，源极势垒低。特别是，它示出，低饱和电压保持在高电流和源漏分离不敏感。此外，即使对于亚微米源极-漏极分离，输出阻抗也得以保持。(C)2005年美国物理学会。
Compared with the field-effect transistor, the source-gated transistor has a much lower saturation voltage and higher output impedance. These features are investigated using computer modeling for amorphous silicon transistors operated at high currents when source barriers are low. In particular, it is shown that low saturation voltages are maintained at high current and are insensitive to source-drain separation. Furthermore, the output impedance is preserved even for submicron source-drain separations. (C) 2005 American Institute of Physics.