Influence of oxidation temperature on the interfacial properties of n-type 4H-SiC MOS capacitors
Influence of oxidation temperature on the interfacial properties of n-type 4H-SiC MOS capacitors
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DOI：
10.1016/j.apsusc.2016.11.142
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发表时间：
2017-03
影响因子：
6.7
通讯作者：
Yifan Jia;Hongliang Lv;Qingwen Song;Xiaoyan Tang;Li Xiao;Liangyong Wang;Guangming Tang;Yimen Zhang;Yuming Zhang
中科院分区：
文献类型：
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作者：
Yifan Jia;Hongliang Lv;Qingwen Song;Xiaoyan Tang;Li Xiao;Liangyong Wang;Guangming Tang;Yimen Zhang;Yuming Zhang
系统地研究了氧化温度对n型4H-碳化硅金属氧化物半导体电容器界面性能的影响。采用1200℃、1300℃和1350℃三种不同氧化温度的热干法生长二氧化硅介质，然后在1175℃的无气氛中进行标准的后氧化退火(POA)2小时。原子力显微镜测量了POA工艺前热生长的二氧化硅的均方根粗糙度随着氧化温度的升高而减小，从1350℃氧化的样品获得了均方根值为0.157 nm的原子平整表面，并用多种电学测量方法评估了样品的近界面陷阱密度和有效固定介质电荷，呈现出随氧化温度的升高而减小的趋势。用电导法测量了1350℃氧化样品在距导带边缘0.2 eV处的界面态密度为3×1011 cm−2 eV−1。二次离子质谱仪和X射线光电子能谱结果表明，高温氧化可以减小过渡层的宽度，减少界面附近的过剩硅和硅亚氧化物成分，从而有效地改善了界面性能。
The effect of oxidation temperature on interfacial properties ofn-type 4H-SiC metal-oxide-semiconductor capacitors has been systematically investigated. Thermal dry oxidation process with three different oxidation temperatures 1200 °C, 1300 °C and 1350 °C were employed to grow SiO2dielectric, following by the standard post-oxidation annealing (POA) in NO ambience at 1175 °C for 2 h. The root mean square (RMS) roughness measured by Atomic Force Microscopy for the thermally grown SiO2before POA process is reduced with increasing the oxidation temperature, obtaining an atomically flat surface with a RMS of 0.157 nm from the sample oxidized at 1350 °C. Several kinds of electrical measurements were used to evaluate the densities of near interface traps and effective fixed dielectric charge for the samples, exhibiting a trend reduced with increasing the oxidation temperature. The interface state density of 3 × 1011cm−2eV−1at 0.2 eV from the conduction band edge was achieved from conductance method measurement for the sample oxidized at 1350 °C. The results from Secondary Ion Mass Spectroscopy and X-ray Photoelectron Spectroscopy demonstrate that high oxidation temperature can reduce the width of transition layer, the excess Si and silicon suboxide compositions near the interface, leading to effective improvement of the interfacial properties.