The CLARO ASIC: Design and performance of prototype integrated circuits for fast single photon counting at low power
The CLARO ASIC: Design and performance of prototype integrated circuits for fast single photon counting at low power
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CLARO ASIC：低功耗快速单光子计数原型集成电路的设计和性能
DOI：
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发表时间：
2013
期刊：
影响因子：
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通讯作者：
G. Pessina
中科院分区：
文献类型：
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作者：
P. Carniti;A. Cotta Ramusino;C. Gotti;M. Maino;R. Malaguti;G. Pessina
CLARO是一款用于像素化光电倍增管单光子计数的ASIC，旨在以低功耗维持高计数率。它主要用于在大型强子对撞机升级的LHCb RICH探测器中读出多阳极光电倍增管（ma - pmt）。第一个四通道原型，名为CLARO-CMOS，采用0.35 μm CMOS技术实现，展示了以非常高的速率（高达10 MHz）计数单光子的能力，每个通道的功耗约为1 mW。本文首次对CLARO-CMOS与Hamamatsu R11265多阳极光电倍增管耦合的单光子计数性能进行了测试。
The CLARO is an ASIC for single photon counting with pixellated photomultipliers, designed to sustain a high counting rate at low power. It was primarily developed to readout multi-anode photomultipliers (Ma-PMTs) in the upgraded LHCb RICH detectors at the LHC. The first four-channel prototype, named CLARO-CMOS, was realized in a 0.35 μm CMOS technology, demonstrating the capability to count single photons at very high rates, up to 10 MHz, with a low power consumption of about 1 mW per channel. In this paper, the first tests of the single photon counting performance of the CLARO-CMOS coupled to a Hamamatsu R11265 multi-anode photomultiplier tube are presented.