Six-input lookup table circuit with 62% fewer transistors using nonvolatile logic-in-memory architecture with series/parallel-connected magnetic tunnel junctions
Six-input lookup table circuit with 62% fewer transistors using nonvolatile logic-in-memory architecture with series/parallel-connected magnetic tunnel junctions
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六输入%20lookup%20table%20电路%20with%2062%%20fewer%20晶体管%20using%20非易失性%20logic-in-memory%20architecture%20with%20串联/并联%20magic%20tunnel%20junctions
DOI：
10.1063/1.3672411
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发表时间：
2012
影响因子：
3.2
通讯作者：
T. Hanyu
中科院分区：
文献类型：
--
作者：
D. Suzuki;M. Natsui;T. Endoh;H. Ohno;T. Hanyu
提出了一种用于无待机功耗现场可编程门阵列的紧凑型6输入查找表（LUT）电路，该电路采用具有串联/并联磁隧道结（MTJ）器件的非易失性内存逻辑（LIM）架构。MTJ器件的串联/并联连接不仅能够降低电阻变化的影响，还能增强电阻值的可编程性，即使在近期纳米级超大规模集成电路中工艺变化严重的情况下，也能实现足够的检测裕度。此外，额外的MTJ器件不会增加有效芯片面积，因为使用MTJ器件的配置电路得到了简化，并且这些器件堆叠在CMOS平面之上。结果，与传统的非易失性LUT电路相比，所提出电路的晶体管数量减少了62%，在传统的非易失性LUT电路中，仅基于CMOS的易失性静态随机存取存储单元电路被基于MTJ的非易失性电路所取代。
A compact 6-input lookup table (LUT) circuit using nonvolatile logic-in-memory (LIM) architecture with series/parallel-connected magnetic tunnel junction (MTJ) devices is proposed for a standby-power-free field-programmable gate array. Series/parallel connections of MTJ devices make it possible not only to reduce the effect of resistance variation, but also to enhance the programmability of resistance values, which achieves a sufficient sensing margin even when process variation is serious in the recent nanometer-scaled VLSI. Moreover, the additional MTJ devices do not increase the effective chip area because the configuration circuit using MTJ devices is simplified and these devices are stacked over the CMOS plane. As a result, the transistor counts of the proposed circuit are reduced by 62% in comparison with those of a conventional nonvolatile LUT circuit where CMOS-only-based volatile static random access memory cell circuits are replaced by MTJ-based nonvolatile ones.