IMCS2: Novel Device-to-Architecture Co-Design for Low-Power In-Memory Computing Platform Using Coterminous Spin Switch
IMCS2: Novel Device-to-Architecture Co-Design for Low-Power In-Memory Computing Platform Using Coterminous Spin Switch
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DOI：
10.1109/tmag.2018.2819959
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发表时间：
2018-04
影响因子：
2.1
通讯作者：
Farhana Parveen;Shaahin Angizi;Zhezhi He;Deliang Fan
中科院分区：
文献类型：
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作者：
Farhana Parveen;Shaahin Angizi;Zhezhi He;Deliang Fan
自旋开关（SS）是一种极具发展前景的自旋电子器件，具有结构紧凑、低功耗、无挥发性、利用巨大自旋霍尔效应的输入输出隔离、自旋传递扭矩和偶极耦合等特点。在本文中，我们提出了一种基于共端SS （IMCS2）的内存计算平台的新型器件到架构协同设计，该平台可以同时作为非易失性存储器和可重构的内存逻辑（and /NAND， OR/NOR和XOR/XNOR），而无需在存储芯片上附加逻辑电路。计算出的逻辑输出可以像普通的磁性随机存取存储器位单元一样，使用共享存储器外围电路简单地读出。这种内在的内存逻辑可以用于在内存中处理数据，从而大大减少传统冯·诺依曼计算系统中的耗电量和长距离数据通信。与基于dram的内存计算平台相比，基于imcs2的内存批量位布尔向量运算节能${\sim}9倍，加速${\sim}3倍。我们进一步使用内存乘法来评估所提出的内存计算平台对不同向量大小的向量-向量乘法的性能。
Spin switch (SS) is a promising spintronic device which exhibits compactness, low power, non-volatility, input–output isolation leveraging giant spin Hall effect, spin transfer torque, and dipolar coupling. In this paper, we propose a novel device-to-architecture co-design for an in-memory computing platform using coterminous SS (IMCS2), which could simultaneously work as non-volatile memory and reconfigurable in-memory logic (AND/NAND, OR/NOR, and XOR/XNOR) without add-on logic circuits to memory chip. The computed logic output could be simply read out like a normal magnetic random access memory bit cell using the shared memory peripheral circuits. Such intrinsic in-memory logic could be used to process data within memory to greatly reduce power-hungry and long distance data communication in the conventional von Neumann computing system. The IMCS2-based in-memory bulk bitwise Boolean vector operation shows ${\sim }9\times $ energy saving and ${\sim }3\times $ speedup compared with that of DRAM-based in-memory computing platform. We further employ in-memory multiplication to evaluate the performance of the proposed in-memory computing platform for vector–vector multiplication with different vector sizes.