Increase in Read Noise Margin of Single-bit-line SRAM using Adiabatic Change of Word Line Voltage
Increase in Read Noise Margin of Single-bit-line SRAM using Adiabatic Change of Word Line Voltage
复制标题
利用字线电压的绝热变化增加单位线 SRAM 的读取噪声容限
DOI：
10.1109/tvlsi.2013.2247642
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发表时间：
2014
影响因子：
2.8
通讯作者：
and Yoshio Matsuda
中科院分区：
文献类型：
--
作者：
Shunji Nakata;Hiroki Hanazono;Hiroshi Makino;Hiroki Morimura;Masayuki Miyama;and Yoshio Matsuda
已发现在读取操作期间采用字线的绝热充电的单位线（BL）静态RAM（SRAM）电路为阅读提供大的动态噪声容限（DNM）。通过使用左存取晶体管和共享阅读端口来实现单BL阅读。共享的阅读端口极大地减小了BL电容，使得连接到触发器的低电压节点的BL的电压能够从预充电电压改变到GND。DNM随时间变化的分析表明，该电路的读噪声容限比传统的双BL电路的读噪声容限大1.9倍。该电路能够设计比传统SRAM更小的SRAM，从而降低能耗。
A single-bit-line (BL) static RAM (SRAM) circuit that employs adiabatic charging of a word line during a read operation was found to provide a large dynamic noise margin (DNM) for reading. Single-BL reading is achieved by using a left access transistor and a shared reading port. The shared reading port greatly reduces the BL capacitance, enabling the voltage of the BL connected to the low-voltage node of the flip-flop to change from the precharge voltage to GND. An analysis of the time-wise change in DNM revealed that the read noise margin of this circuit was 1.9 times larger than that of a conventional two-BL circuit. This circuit enables the design of an SRAM that is smaller than a conventional one, resulting in lower energy consumption.