Simulation of Unstable Oscillations in PWM Variable Speed Drives
Simulation of Unstable Oscillations in PWM Variable Speed Drives
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DOI：
10.1109/28.87264
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发表时间：
1986-09
期刊：
影响因子：
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通讯作者：
M. Lockwood
中科院分区：
文献类型：
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作者：
M. Lockwood
预测逆变器供电的感应电机的动态和稳态行为的技术由来已久，并得到了很好的验证[1-6]。然而，软件开发成本阻碍了此类技术的使用，使其无法像实现逆变器驱动那样广泛使用。这导致了对观察到的电压型逆变器供电驱动器不稳定行为的原因出现潜在的误解的情况。在最近发表的几篇技术论文中，VSI驱动器在低速时的极限环不稳定被归因于逆变器的开关效应或专用LSI PWM器件输出波形中的轻微抖动。本文利用仿真技术对这种极限环不稳定性进行了研究。采用了两种技术：1)全仿真，包括逆变器谐波、抗重叠延迟、开路电压和输出波形抖动的影响。2)忽略逆变器输出谐波和其他输出波形缺陷的降阶仿真。这些模拟是正在开发的商业软件包的一部分。研究了极限环不稳定性，有强有力的迹象表明，它们是逆变器电源阻抗/感应电机组合所固有的，并且相对独立于逆变器输出波形的谐波、抖动和其他缺陷。
Techniques to predict the dynamic and steady state behaviour of inverter-fed induction machines are long established and well validated [1 - 6]. However, software development costs have precluded the use of such techniques from becoming as widespread as the implementation of inverter-fed drives. This has led to the situation where potential misunderstanding has arisen over the causes of observed unstable behaviour of voltage source inverter-fed drives. In several recent presentations of technical papers limit cycle instabilities of VSI drives at low speeds have been attributed to the switching effects of the inverter or slight jitter in the output waveform of a proprietry LSI PWM device. The present paper concerns the study of such limit cycle instabilities using simulation techniques. Two techniques are used: 1) A full simulation including the effects of inverter harmonics, anti-overlap delays, open-circuit voltages and output waveform jitter. 2) A reduced order simulation which neglects inverter output harmonics and other output waveform defects. These simulations form part of a commercial software package under development. Limit cycle instabilities are studied and there are strong indications that they are inherent in the inverter source impedance/induction motor combination and are relatively independent of inverter output waveform harmonics, jitter and other defects.