Study of Local Power Dissipation in Ultrascaled Silicon Nanowire FETs
Study of Local Power Dissipation in Ultrascaled Silicon Nanowire FETs
复制标题
超大规模硅纳米线 FET 局部功耗研究
DOI：
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发表时间：
2015
影响因子：
4.9
通讯作者：
R. Valin
中科院分区：
文献类型：
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作者：
A. Martinez;J. Barker;M. Aldegunde;R. Valin
利用量子输运理论计算了场效应纳米线晶体管的局域电子功率耗散。考虑了两种不同的沟道截面以及光学和声学声子机制。所用的声子模型再现声子有限的迁移率在研究的横截面。计算了源极、沟道和漏极尺寸不同组合的功耗。由于器件内部缺乏完整的电子能量弛豫，焦耳热耗散高估了小型纳米晶体管中耗散的功率。由于声子散射较弱，这种高估对于大截面更大。另一方面，在窄导线中，器件内部的功率耗散可能很大，因此减轻了非常窄的纳米线晶体管的制造。我们还研究了由于源和沟道之间的珀耳帖系数的不匹配而导致的器件源区的冷却。
The local electron power dissipation has been calculated in a field-effect nanowire transistor using a quantum transport formalism. Two different channel cross sections and optical and acoustic phonon mechanisms were considered. The phonon models used reproduce the phonon limited mobility in the cross sections studied. The power dissipation for different combinations of source, channel, and drain dimensions have been calculated. Due to the lack of complete electron energy relaxation inside the device, the Joule heat dissipation over-estimates the power dissipated in small nanotransistors. This over-estimation is larger for large cross sections due to the weaker phonon scattering. On the other hand, in narrow wires, the power dissipation inside the device can be large, therefore, mitigating against fabrication of very narrow nanowire transistors. We have also investigated the cooling of the device source region due to the mismatch of the Peltier coefficients between the source and the channel.