The FPGA implementation of the RC6 and CAST-256 encryption algorithms

The FPGA implementation of the RC6 and CAST-256 encryption algorithms
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RC6和CAST-256加密算法的FPGA实现

DOI:
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发表时间:
1999
期刊:
Engineering Solutions for the Next Millennium. 1999 IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.99TH8411)
影响因子:
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通讯作者:
H. Heys
H. Heys
中科院分区:
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文献类型:
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作者:
M. Riaz;H. Heys

文献摘要

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美国国家标准与技术研究所(NIST)已经启动了开发高级加密标准(AES)的过程,该高级加密标准指定了基于128位块大小的私钥加密算法,以替代数据加密标准(DES)。我们调查的效率,两个AES候选人,RC 6和CAST-256,从硬件实现的角度与现场可编程门阵列(FPGA)作为目标技术。我们的密码的分析和合成研究表明,这将是可取的FPGA实现,有一个更简单的密码设计,使使用更简单的操作,不仅具有良好的密码属性,但也使整体密码设计效率从硬件实现的角度来看。
The National Institute of Standards and Technology (NIST) in the U.S. has initiated a process to develop an Advanced Encryption Standard (AES) specifying a private-key encryption algorithm based on a 128-bit block size as a replacement for the Data Encryption Standard (DES). We investigate the efficiency of two AES candidates, RC6 and CAST-256, from the hardware implementation perspective with field programmable gate arrays (FPGAs) as the target technology. Our analysis and synthesis studies of the ciphers suggest that it would be desirable for FPGA implementations to have a simpler cipher design that makes use of simpler operations that not only possess good cryptographic properties, but also make the overall cipher design efficient from the hardware implementation perspective.