On-chip jitter-spectrum-analyzer for high-speed digital designs
On-chip jitter-spectrum-analyzer for high-speed digital designs
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用于高速数字设计的片上抖动频谱分析仪
DOI:
10.1109/isscc.2004.1332738
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发表时间:
2004
期刊:
影响因子:
--
通讯作者:
M. Mizuno
中科院分区:
文献类型:
--
作者:
M. Takamiya;H. Inohara;M. Mizuno
An on-chip jitter-spectrum analyzer (JSA) implemented in 0.18/spl mu/m CMOS can locate and analyze trouble-spots in on- and off-chip power and clock distribution networks during the actual operations in the field. A feedback design-flow using JSA improves the performance of 1GHz digital LSIs.