Germanium MOSFET devices: Advances in materials understanding, process development, and electrical performance

Germanium MOSFET devices: Advances in materials understanding, process development, and electrical performance
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DOI:
10.1149/1.2919115
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发表时间:
2008-01-01
影响因子:
3.9
通讯作者:
Heyns, M. M.
Heyns, M. M.
中科院分区:
工程技术4区
文献类型:
--
作者:
Brunco, D. P.;De Jaeger, B.;Heyns, M. M.

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锗具有比硅更高的电子和空穴迁移率。然而,在这些基本材料参数和高性能微电子的实现之间存在着巨大的飞跃。本文讨论了Ge金属氧化物半导体场效应晶体管(MOSFET)的一些主要问题。概述了衬底选项。位错还原>800℃使Ge-on-Si晶片的穿线位错密度降低10倍至10(7)cm(-2);然而,仅观察到结泄漏减少2倍,且对导通电流没有任何好处。报道了Ge在各种酸性、碱性、氧化性和有机溶液中的湿法刻蚀速率,并讨论了适合于Ge的RCA清洗的改进。薄的应变外延硅被认为是Ge/栅电介质界面的钝化,其最佳厚度类似于6个单分子层。综述了掺杂剂的种类。比较了P晕和As晕,并观察到As具有更好的短沟道控制。给出了p+/n二极管的面漏电流,其中n掺杂水平在与PMOS相关的范围内变化。讨论了德国人的选择,奈吉表现出了最大的希望。报道了NiGe的一种缺陷模式,以及涉及两个退火步的修复。最后,展示了工艺结束H-2退火热处理对器件性能的好处。(C)2008年电化学会。
Germanium possesses higher electron and hole mobilities than silicon. There is a big leap, however, between these basic material parameters and implementation for high-performance microelectronics. Here we discuss some of the major issues for Ge metal oxide semiconductor field effect transistors (MOSFETs). Substrate options are overviewed. A dislocation reduction anneal >800 degrees C decreases threading dislocation densities for Ge-on-Si wafers 10-fold to 10(7) cm(-2); however, only a 2 times reduction in junction leakage is observed and no benefit is seen in on-state current. Ge wet etch rates are reported in a variety of acidic, basic, oxidizing, and organic solutions, and modifications of the RCA clean suitable for Ge are discussed. Thin, strained epi-Si is examined as a passivation of the Ge/gate dielectric interface, with an optimized thickness found at similar to 6 monolayers. Dopant species are overviewed. P and As halos are compared, with better short channel control observed for As. Area leakage currents are presented for p +/n diodes, with the n-doping level varied over the range relevant for pMOS. Germanide options are discussed, with NiGe showing the most promise. A defect mode for NiGe is reported, along with a fix involving two anneal steps. Finally, the benefit of an end-of-process H-2 anneal for device performance is shown. (C) 2008 The Electrochemical Society.