Capacitive effects in quasi-steady-state voltage and lifetime measurements of silicon devices
Capacitive effects in quasi-steady-state voltage and lifetime measurements of silicon devices
复制标题
硅器件准稳态电压和寿命测量中的电容效应
DOI：
10.1063/1.2073973
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发表时间：
2005
影响因子：
3.2
通讯作者：
F. Recart
中科院分区：
文献类型：
--
作者：
A. Cuevas;F. Recart
当在准稳态（QSS）条件下测量I-V特性和载流子寿命时，重要的是要考虑由于器件内过量载流子引起的电荷的时间依赖性。本文指出，pn结器件和许多寿命测试结构中存在的空间电荷区，在测量QSS I-V曲线的低电压和低载流子密度范围时，会产生显著的电容效应。计算机建模和实验都表明，结电容在低电阻率硅晶片的情况下特别重要，但在中间和高电阻率样品中也可以注意到。本文证明了静态I-V特性可以准确地重建使用一个简单的空间电荷区的分析模型。因此，它填补了QSS电压和寿命测量的低注入范围的理解的空白。
When measuring I-V characteristics and carrier lifetimes in quasi-steady-state (QSS) conditions, it is important to consider the time dependence of the charge due to excess carriers within the device. This paper shows that the space-charge region present in pn-junction devices and in many lifetime test structures can produce a significant capacitive effect when measuring the low voltage and low carrier density range of QSS I-V curves. Both computer modeling and experiments show that the junction capacitance is particularly significant in the case of low-resistivity silicon wafers, but it can also be noticeable in intermediate and high-resistivity samples. The paper demonstrates that the static I-V characteristics can be accurately reconstructed using a simple analytical model for the space-charge region. It thus fills a gap in the understanding of the low injection range of QSS voltage and lifetime measurements.