System design, optimization and intelligent code generation for standard digital signal processors
System design, optimization and intelligent code generation for standard digital signal processors
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标准数字信号处理器的系统设计、优化和智能代码生成
DOI：
10.1109/iscas.1989.100415
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发表时间：
1989
期刊：
影响因子：
--
通讯作者：
E. Van de Velde
中科院分区：
文献类型：
--
作者：
D. Genin;J. De Moortel;D. Desmet;E. Van de Velde
描述了数字信号处理器 (DSP) 的新代码生成器的架构以及新的高级规范环境的动机。使用图形信号流图（SFG）和青贮语言作为输入规范。可以为现有的商用 DSP 处理器生成极其高效的代码。由于系统中嵌入了 DSP 知识，生成的代码比传统 C 编译器生成的代码快约 5 到 50 倍，可与 DSP 专家生成的代码相媲美。代码生成器是功能强大的 DSP 设计环境的一部分，允许用户选择基于一个或多个商用 DSP 处理器的解决方案，或选择此框架中可用的 DSP 芯片编译器之一。系统级或位真软件模拟器或硬件加速器也可以在设计的不同阶段调用。<<ETX>>
The architecture of a new code generator for digital signal processors (DSPs) and the motivations for a new high-level specification environment are described. Graphical signal flow graph (SFG) and the Silage language are used as input specifications. Extremely efficient code can be generated for existing commercially available DSP processors. Because of the DSP knowledge embedded in the system, the code generated is about five to 50 times faster than the one produced with conventional C compilers and is comparable to the code generated by DSP experts. The code generator comprises part of a powerful DSP design environment that allows the user to choose a solution based on one or more commercially available DSP processors or to select one of the DSP silicon compilers available in this framework. System-level or bit true software simulators or hardware accelerators can also be called at different stages of the design.<<ETX>>