Analysis and design of an overcurrent protection scheme based on parasitic inductance of SiC MOSFET power module
Analysis and design of an overcurrent protection scheme based on parasitic inductance of SiC MOSFET power module
复制标题
基于SiC MOSFET功率模块寄生电感的过流保护方案分析与设计
DOI：
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发表时间：
2018
期刊：
影响因子：
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通讯作者：
Edward Choi
中科院分区：
文献类型：
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作者：
Keyao Sun;Jun Wang;R. Burgos;D. Boroyevich;Yonghan Kang;Edward Choi
提出了一种基于电源与功率模块开尔文源之间寄生电感的过流保护方案。给出了完整的设计过程和过流保护方案的全面分析，该方案可普遍应用于任何含开尔文源的功率模块。保护电路可用于检测非常强烈的短路故障（SC）和相对缓慢的过电流故障（OC），例如负载外故障。设计了一个集成过流保护电路的1.2 kV SiC MOSFET栅极驱动器原型，验证了该保护方法的功能。
This paper presents an overcurrent protection scheme based on parasitic inductance between the power source and the Kelvin source of the power module. A complete design process and comprehensive analysis of the overcurrent protection scheme, which can be applied generally, to any power module containing Kelvin source is shown. The protection circuit can be used to detect both very intense short-circuit fault (SC) and relatively slow overcurrent fault (OC), fault out of load for example. A 1.2 kV SiC MOSFET gate driver prototype with integrated overcurrent protection circuit is designed to verify the functionality of the protection method.