The Potential of On-Chip Memory Systems for Future Vector Architectures
The Potential of On-Chip Memory Systems for Future Vector Architectures
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片上存储器系统在未来矢量架构中的潜力
DOI：
10.1007/978-3-540-74384-2_18
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发表时间：
2008
期刊：
影响因子：
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通讯作者：
Koki Okabe
中科院分区：
文献类型：
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作者：
Hiroaki Kobayashi;A. Musa;Y. Sato;Hiroyuki Takizawa;Koki Okabe
与标量系统相比，现代矢量系统的最有利功能是它们的出色记忆性能。 ，[10]，[1]。法律，有关flop/s率的处理器性能会显着提高，但记忆性能不能遵循它[2]在1998年，到2003年的4个，至2007年的2个。我们指出，即使在向量系统的情况下，即使在矢量系统中，也会严重降低记忆带宽，尽管它们的绝对性能也会影响持续的系统性能[3]性能在一定程度上提高。记忆性能肯定成为设计未来高效的矢量体系结构的关键点之一，以在多核处理器的时代生存。
The most advantageous feature of modern vector systems is their outstanding memory performance compared to scalar systems. This feature brings them to their high-sustained system performance when executing real application codes, which are extensively used in the fields of advanced sciences and engineering [9],[10],[1]. However, recent trends in semiconductor technology generate a strong head wind for vector systems. Thanks to the historical growth rate in on-chip silicon budget, named Moore’s law, processor performance regarding flop/s rates increases remarkably, but memory performance cannot follow it [2]. Regarding vector systems, their bytes/flop rates that show the balance between flop/s performance and memory bandwidth go down from 8 B/flop in 1998, to 4 in 2003, and to 2 in 2007. We have pointed out that reducing the memory bandwidth seriously affects the sustained system performance even in case of vector systems [3], although their absolute performance increases to a certain degree. Memory performance definitely becomes one of key points for design of future highly-efficient vector architectures to survive in an era of multi-core processors.
HEC 系统中内存性能的影响
DOI：
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发表时间：
2006
期刊：
High Performance Computing on Vector Systems(Springer-Verlag)
影响因子：
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作者：
Yukinori Sato;Ken-ichi Suzuki and Tadao Nakamura;Hiroaki Kobayashi
通讯作者：
Hiroaki Kobayashi