Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies
Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies
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对具有多个电源的 220 Kgates WLAN 片上系统中的基板噪声生成进行建模和实验验证
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发表时间：
2003
期刊：
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通讯作者：
S. Signell
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作者：
M. Badaroglu;S. Donnay;H. Man;Y. Zinzius;G. Gielen;W. Sansen;T. Fondén;S. Signell
衬底噪声是混合信号集成的主要障碍。虽然功耗与时钟频率成线性比例，但由于到衬底的电源电流的传递函数中的谐振，衬底噪声不具有这种比例。本文提出了一种实用的技术来估计一个大的混合模式系统芯片（SoC）与多电源和嵌入式存储器的基板噪声频谱。结果已通过在60 MHz 220 Kgates电信SoC上进行的衬底噪声测量得到验证，该SoC采用0.35 /spl mu/m CMOS工艺在EPI型衬底上实现。我们计算一个线性的芯片级基板模型连同单周期表示的分段线性噪声源的三个供应区域中使用的ASIC。基于这个模型，我们准确地估计基板噪声谱中的四个主要谐振和它们的相对幅度，在主要谐振处相对于测量具有2 dB的相对误差。我们还提出了在不同的工作模式的WLAN接收机的基板噪声测量。这些测量结果表明，输出I/O缓冲器会产生显著的基板噪声，其中由于六个输出I/O缓冲器与已经完全切换的数据路径和两个输出I/O的额外同时切换，测量到基板噪声峰峰值增加了44%。
Substrate noise is a major obstacle for mixed-signal integration. While the power consumption scales linearly with the clock frequency, substrate noise does not have this scaling due to the resonances in the transfer function of the supply current to the substrate. This paper addresses a practical technique to estimate the substrate noise frequency spectrum of a large mixed-mode System-on-Chip (SoC) with multiple supplies and embedded memories. The results have been verified with substrate noise measurements on a 60-MHz 220-Kgates telecom SoC implemented in a 0.35 /spl mu/m CMOS process on an EPI-type substrate. We compute a linear chip-level substrate model together with the single-cycle representation of piecewise-linear noise sources of three supply regions used in this ASIC. Based on this model we accurately estimate the four major resonances in the substrate noise spectrum and their relative magnitudes with 2 dB relative error at the major resonance with respect to measurements. We also present substrate noise measurements at different operating modes of the WLAN receiver. These measurements show that output I/O buffers generate significant substrate noise where an increase of 44% is measured for substrate noise peak-to-peak value due to the additional simultaneous switching of six output I/O buffers with already fully switching datapath and two output I/Os.