Invoking and Linking Generators from Multiple Hardware Languages using CoreIR

Invoking and Linking Generators from Multiple Hardware Languages using CoreIR
复制标题

使用 CoreIR 从多种硬件语言调用和链接生成器

DOI:
--
复制
发表时间:
2018
期刊:
影响因子:
--
通讯作者:
Pat Hanrahan
Pat Hanrahan
中科院分区:
--
文献类型:
--
作者:
Ross G. Daly;Lenny Truong;Pat Hanrahan

文献摘要

被引文献

相似文献

在本文中,我们主张EDA社区应该投资于支持语言互操作性和链接的基础设施,这反过来将促进语言多样性,这是软件世界中的一个成功概念。我们开始观察软件社区如何开发标准和基础设施,以支持编程语言的互操作性,然后讨论如何将这些技术应用到硬件语言。特别是,本文提出了应用软件链接到硬件设计领域的概念。当考虑使用电路生成器时,会出现一个关键问题,电路生成器是消耗参数并生成硬件电路的程序。电路生成器依赖于编程语言和硬件语言的集成,这使得概念链接变得复杂。为了解决这个问题,我们提出了外来生成器接口(FGI)的概念,这是对软件中的外来函数接口的一种适应,它可以构建使用多种语言生成器的硬件设计。然后,我们展示了如何FGI可以用来实现阶段生成器编译(SGC),这是一个基于链接的硬件编译过程的启发多阶段编程。最后,我们提出了CoreIR,硬件中间表示和编译器框架,提供了必要的基础设施,实现FGI和SGC。
In this paper, we advocate that the EDA community should invest in infrastructure that supports language interoperability and linking, which in turn will promote language diversity, a successful concept in the software world. We begin by observing how the software community has developed standards and infrastructure to support programming language interoperability, followed by discussion of how these techniques can be applied to hardware languages. In particular, this paper proposes applying the concept of software linking to the domain of hardware design. A key issue arises when considering the use of circuit generators, programs that consume parameters and produce hardware circuits. Circuit generators rely on the integration of a programming language and a hardware language, which complicates the notion linking. To address this, we propose the concept of the Foreign Generator Interface (FGI), an adaptation of the of the Foreign Function Interface from software, which enables the construction of hardware designs that use generators from multiple languages. Then, we show how FGI can be used to implement Staged Generator Compilation (SGC), which is a linking-based hardware compilation process inspired by multi-stage programming. Finally, we present CoreIR, a hardware intermediate representation and compiler framework that provides the requisite infrastructure for implementing FGI and SGC.