Invoking and Linking Generators from Multiple Hardware Languages using CoreIR
Invoking and Linking Generators from Multiple Hardware Languages using CoreIR
复制标题
使用 CoreIR 从多种硬件语言调用和链接生成器
DOI:
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发表时间:
2018
期刊:
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通讯作者:
Pat Hanrahan
中科院分区:
文献类型:
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作者:
Ross G. Daly;Lenny Truong;Pat Hanrahan
In this paper, we advocate that the EDA community should invest in infrastructure that supports language interoperability and linking, which in turn will promote language diversity, a successful concept in the software world. We begin by observing how the software community has developed standards and infrastructure to support programming language interoperability, followed by discussion of how these techniques can be applied to hardware languages. In particular, this paper proposes applying the concept of software linking to the domain of hardware design. A key issue arises when considering the use of circuit generators, programs that consume parameters and produce hardware circuits. Circuit generators rely on the integration of a programming language and a hardware language, which complicates the notion linking. To address this, we propose the concept of the Foreign Generator Interface (FGI), an adaptation of the of the Foreign Function Interface from software, which enables the construction of hardware designs that use generators from multiple languages. Then, we show how FGI can be used to implement Staged Generator Compilation (SGC), which is a linking-based hardware compilation process inspired by multi-stage programming. Finally, we present CoreIR, a hardware intermediate representation and compiler framework that provides the requisite infrastructure for implementing FGI and SGC.