Low Thermal Boundary Resistance Interfaces for GaN-on-Diamond Devices.
Low Thermal Boundary Resistance Interfaces for GaN-on-Diamond Devices.
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DOI：
10.1021/acsami.8b07014
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发表时间：
2018-06
影响因子：
9.5
通讯作者：
Luke Yates;Jonathan Anderson;X. Gu;Cathy Lee;T. Bai;M. Mecklenburg;T. Aoki;M. Goorsky;M. Kuball;E. Piner;S. Graham
中科院分区：
文献类型：
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作者：
Luke Yates;Jonathan Anderson;X. Gu;Cathy Lee;T. Bai;M. Mecklenburg;T. Aoki;M. Goorsky;M. Kuball;E. Piner;S. Graham
金刚石衬底氮化镓器件的发展为高功率密度电子器件的产生带来了很大的希望。在这些器件的生长过程中，在GaN和金刚石之间放置了一个介电层，这可以显著提高结构的整体热阻。在这项工作中，我们探讨了不同的界面的作用，有助于GaN/金刚石层的界面的热阻，特别是使用5纳米层的AlN，SiN，或根本没有中间层。使用时域热反射沿着电子能量损失谱，我们能够确定SiN界面层提供最低的边界热阻（<10 m2 K/GW），因为在界面处形成Si-C-N层。观察到AlN和无夹层样品具有大于20 m2 K/GW的TBR，这是由于当GaN未被适当保护时粗糙化界面（增强声子散射）的恶劣生长环境。
The development of GaN-on-diamond devices holds much promise for the creation of high-power density electronics. Inherent to the growth of these devices, a dielectric layer is placed between the GaN and diamond, which can contribute significantly to the overall thermal resistance of the structure. In this work, we explore the role of different interfaces in contributing to the thermal resistance of the interface of GaN/diamond layers, specifically using 5 nm layers of AlN, SiN, or no interlayer at all. Using time-domain thermoreflectance along with electron energy loss spectroscopy, we were able to determine that a SiN interfacial layer provided the lowest thermal boundary resistance (<10 m2K/GW) because of the formation of an Si-C-N layer at the interface. The AlN and no interlayer samples were observed to have TBRs greater than 20 m2K/GW as a result of a harsh growth environment that roughened the interface (enhancing phonon scattering) when the GaN was not properly protected.