A Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m $\Omega$ Large-DCR Inductor

A Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m $\Omega$ Large-DCR Inductor
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A%20Hybrid%20Structure%20Dual-Path%20Step-Down%20Converter%20With%2096.2%%20Peak%20Efficiency%20Using%20250-m%20$Omega$%20Large-DCR%20Inductor

DOI:
10.1109/jssc.2018.2882526
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发表时间:
2019
影响因子:
5.4
通讯作者:
G. Cho
G. Cho
中科院分区:
工程技术1区
文献类型:
--
作者:
Yeunhee Huh;Sung;G. Cho

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为实现移动电源管理集成电路(pmic)的高功率效率,提出了一种双路降压转换器(DPDC)。该DPDC采用一个电感和一个飞行电容的混合结构,通过两条并联路径提供负载电流,解决了传统降压变换器(CBC)拓扑结构的固有问题,即电感器的大DCR (<inline-formula> < text -math符号="LaTeX">${R}_{\ mathm {DCR}}$ </ text -math></inline-formula>)造成的显著功率损耗。因此,DPDC实现了很高的功率效率,从而也减少了加热问题,这是移动设备的另一个关键问题。此外,DPDC可以通过减轻电感器<inline-formula> < text -math符号="LaTeX">${R}_{\ mathm {DCR}}$ </ text -math></inline-formula>规范,以较低的制造成本缩小PMIC集的体积。在本文中,虽然我们的测量使用了250 <inline-formula> < text -math符号="LaTeX">$\text{m}\Omega $ </ text -math></inline-formula>的大型<inline-formula> < text -math符号="LaTeX">${R}_{\ mathm {DCR}}$ </ text -math></inline-formula>电感器,但我们的测量达到了96.2%的峰值效率,总寄生电阻的功率损耗可降低到CBC的30%。此外,根据我们的测量图,与CBC相比,DPDC不仅在宽负载电流(<inline-formula> < text -math符号="LaTeX">$I_{\ mathm {load}}$ </ text -math></inline-formula>)范围内实现了显著更高的效率,而且在宽转换比率(<inline-formula> < text -math符号="LaTeX">$V_{\ mathm {OUT}}/V_{\ mathm {in}}$ </ text -math></inline-formula>)范围内也实现了显著更高的效率。
A dual-path step-down converter (DPDC) is presented for achieving high power efficiency in the mobile power management ICs (PMICs). Adopting a hybrid structure using one inductor and one flying capacitor, the proposed DPDC supplies a load current via two parallel paths, relieved an intrinsic problem of the conventional buck converter (CBC) topology, which is a significant power loss from a large DCR of the inductor (<inline-formula> <tex-math notation="LaTeX">${R}_{\mathrm {DCR}}$ </tex-math></inline-formula>). Therefore, DPDC achieves a high power efficiency and thus also reduces the heating problem, which is another critical issue in the mobile set. Moreover, DPDC can shrink the volume of the PMIC set with a low manufacturing cost by alleviating an <inline-formula> <tex-math notation="LaTeX">${R}_{\mathrm {DCR}}$ </tex-math></inline-formula> specification of the inductor. In this paper, although a 250 <inline-formula> <tex-math notation="LaTeX">$\text{m}\Omega $ </tex-math></inline-formula> of large <inline-formula> <tex-math notation="LaTeX">${R}_{\mathrm {DCR}}$ </tex-math></inline-formula> inductor is used for our measurements, a 96.2% of peak efficiency was achieved and the power loss of total parasitic resistances can be reduced to up to 30% of that of CBC. Moreover, according to our measurement plots, it is verified that DPDC achieves the efficiency notably higher not only in a wide load current (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {LOAD}}$ </tex-math></inline-formula>) range but also in a wide conversion ratio (<inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {OUT}}/V_{\mathrm {IN}}$ </tex-math></inline-formula>) range, compared to CBC.