Electroless Cu seed on Ru and Co liners in high aspect ratio TSV
Electroless Cu seed on Ru and Co liners in high aspect ratio TSV
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DOI：
10.1109/iitc.2014.6831871
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发表时间：
2014-05
期刊：
影响因子：
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通讯作者：
F. Inoue;H. Philipsen;M. H. van der Veen;S. Van Huylenbroeck;S. Armini;H. Struyf;T. Tanaka
中科院分区：
文献类型：
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作者：
F. Inoue;H. Philipsen;M. H. van der Veen;S. Van Huylenbroeck;S. Armini;H. Struyf;T. Tanaka
在Ru或Co保形衬垫上的化学沉积（ELD）Cu籽晶层上通过标准Cu电镀工艺填充了高深宽比的硅通孔（直径3 μm × 50 μm）。在ELD-Cu籽晶上实现电化学填充所需的现场Cu覆盖层为600 nm。这比在具有PVD-Cu晶种（约1500 nm）的常规方案中所需的低得多，并且由此减少了Cu CMP时间。这项工作表明了铜化学沉积技术在TSV金属化过程中的可行性。
High aspect ratio through-silicon vias (3 μm diameter by 50 μm depth) have been filled by standard Cu plating process on electroless deposited (ELD) Cu seed layers on conformal liners of Ru or Co. The in-field Cu overburden that was needed to achieve electrochemical fill on the ELD-Cu seed was 600 nm. This is much lower than would have been needed in a conventional scheme with a PVD-Cu seed (of ~ 1500 nm) and, with that, reduces the Cu CMP time. This work shows the feasibility of Cu electroless as deposition technique in a TSV metallization process.