Capacitor test simulation of retention and imprint characteristics for ferroelectric memory operation
Capacitor test simulation of retention and imprint characteristics for ferroelectric memory operation
复制标题
铁电存储器操作的保留和压印特性的电容器测试模拟
DOI:
10.1080/10584589708013030
复制
发表时间:
1997
影响因子:
0.7
通讯作者:
L. Kammerdiner
中科院分区:
文献类型:
--
作者:
S. Traynor;T. D. Hadnagy;L. Kammerdiner
Abstract Ferroelectric memory devices are subject to failure due to both a simple loss of retention or due to imprint. The difference between retention and imprint as described here depends on the test history of the device. A pulsed capacitor test has been devised to simulate the signal available to a typical memory cell after time and temperature stress. The test sequence consists of individual pulses used to compare the switched component to the non-switched component with the difference being the signal available for memory operation. It has been found that this signal when plotted versus log time for a fixed bake temperature stress produces a straight line.