Improving DVFS in NoCs with Coherence Prediction
Improving DVFS in NoCs with Coherence Prediction
复制标题
通过相干预测改进 NoC 中的 DVFS
DOI：
10.1145/2786572.2786595
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
Natalie D. Enright Jerger
中科院分区：
文献类型：
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作者：
R. Hesse;Natalie D. Enright Jerger
随着片上网络（NoC）持续消耗芯片总功耗预算的很大一部分，动态电压和频率缩放（DVFS）已经发展成为NoC设计中不可或缺的一部分。有效的DVFS依赖于对未来网络状态的准确预测。大多数以前的方法是反应式的，基于以网络为中心的指标，如缓冲区占用和信道利用率。然而，我们发现，这些指标和随后的NoC流量之间几乎没有相关性，这导致次优DVFS决策。在这项工作中，我们建议利用高速缓存一致性通信的高度可预测性，以获得更具体和可靠的NoC流量预测。基于我们的流量预测的DVFS机制与没有DVFS的基线相比降低了41%的功耗，与最先进的DVFS实现相比平均降低了21%，而性能仅降低了3%。
As Networks-on-Chip (NoCs) continue to consume a large fraction of the total chip power budget, dynamic voltage and frequency scaling (DVFS) has evolved into an integral part of NoC designs. Efficient DVFS relies on accurate predictions of future network state. Most previous approaches are reactive and based on network-centric metrics, such as buffer occupation and channel utilization. However, we find that there is little correlation between those metrics and subsequent NoC traffic, which leads to suboptimal DVFS decisions. In this work, we propose to utilize highly predictable properties of cache-coherence communication to derive more specific and reliable NoC traffic predictions. A DVFS mechanism based on our traffic predictions, reduces power by 41% compared to a baseline without DVFS and by 21% on average when compared to a state-of-the-art DVFS implementation, while only degrading performance by 3%.