Randomly Optimized Grid Graph for Low-Latency Interconnection Networks

Randomly Optimized Grid Graph for Low-Latency Interconnection Networks
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低延迟互连网络的随机优化网格图

DOI:
10.1109/icpp.2016.46
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发表时间:
2016
期刊:
The 45th International Conference on Parallel Processing (ICPP 2016)
影响因子:
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通讯作者:
Michihiro Koibuchi
Michihiro Koibuchi
中科院分区:
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文献类型:
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作者:
Koji Nakano;Daisuke Takafuji;Satoshi Fujita;Hiroki Matsutani;Ikki Fujiwara;Michihiro Koibuchi

文献摘要

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在这项工作中,我们提出了随机优化的网格图,以最大限度地提高性能度量,如直径和平均最短路径长度(ASPL),并限制网格表面上的边缘长度。我们还提供了直径和ASPL的理论下界,证明了随机优化网格图的最优性。我们进一步提出了一种对角线网格布局,在边缘长度限制下,与传统的网格布局相比,它显著减小了直径。我们最后展示了它们在片内和片外互连网络的三个案例研究中的应用。我们的设计有效地改进了它们的性能度量,例如端到端通信延迟、网络功耗、成本和并行基准的执行时间。
In this work we present randomly optimized grid graphs that maximize the performance measure, such as diameter and average shortest path length (ASPL), with subject to limited edge length on a grid surface. We also provide theoretical lower bounds of the diameter and the ASPL, which prove optimality of our randomly optimized grid graphs. We further present a diagonal grid layout that significantly reduces the diameter compared to the conventional one under the edge-length limitation. We finally show their applications to three case studies of off-and on-chip interconnection networks. Our design efficiently improves their performance measures, such as end-to-end communication latency, network power consumption, cost, and execution time of parallel benchmarks.