Exploiting synchronous placement for asynchronous circuits onto commercial FPGAs
Exploiting synchronous placement for asynchronous circuits onto commercial FPGAs
复制标题
利用商用 FPGA 上异步电路的同步布局
DOI：
10.1109/fpl.2009.5272378
复制
发表时间：
2009
期刊：
影响因子：
--
通讯作者：
L. Reyneri
中科院分区：
文献类型：
--
作者：
M. Tranchero;L. Reyneri
本文介绍了一种方法，放置自定时电路到商业FPGA，只使用传统的同步工具在市场上。设计的不同部分受到约束，以保持保证正确的电路功能所需的时序关系，并保持布线对系统延迟的影响在不同的迭代中是有界和固定的。这项工作是扩展的CodeSimulink协同设计环境的一部分，我们为了允许从Simulink规范的异步电路的合成。
This paper describes an approach to the placement of self-timed circuits onto commercial FPGAs, using only conventional synchronous tools available on the market. Different parts of the design are constrained in order to maintain the timing relationship required for guaranteeing the correct circuit functionality and to keep the wiring influence on system delays bounded and fixed across the different iterations. This work is part of the extension to the CodeSimulink co-design environment we made in order to allow the synthesis of asynchronous circuits from Simulink specifications.