Radiation effects in SOI technologies
Radiation effects in SOI technologies
复制标题
DOI：
10.1109/tns.2003.812930
复制
发表时间：
2003-06-01
影响因子：
1.8
通讯作者：
Dodd, PE
中科院分区：
文献类型：
--
作者：
Schwank, JR;Ferlet-Cavrois, V;Dodd, PE
绝缘体上硅(SOI)技术已经为抗辐射应用开发了多年，并正在迅速成为主流商业技术。作者综述了SOI器件的总剂量、单粒子效应和剂量率硬度。由于掩埋氧化物的存在，SOI器件的总剂量响应比体硅器件复杂得多。掩埋氧化物中的辐照陷阱电荷会增加部分耗尽晶体管的泄漏电流，降低阈值电压，增加全耗尽晶体管的泄漏电流。为了将SOI器件硬化到体硅器件水平，已经开发了减少捕获在掩埋氧化物中的辐射感生正电荷净量的工艺技术和减轻掩埋氧化物中捕获电荷影响的器件设计技术。SOI技术中电荷收集的敏感体积比体硅器件小得多，这可能会使SOI器件更难发生单粒子翻转(SEU)。然而，浮体效应引起的双极放大会显著降低SOI器件的SEU硬度。车身系带用于减少浮体效应和提高SEU硬度。SOI IC完全不受经典四层p-n-p-n单事件闩锁的影响；然而，浮体效应使SOI IC容易受到单事件快闪(单晶体管闩锁)的影响。SOI器件对剂量率效应的敏感体积通常比体硅器件低两个数量级。通过使用体结来减少双极放大，SOI器件可以实现比体硅器件高得多的剂量率翻转水平。
Silicon-on-insulator (SOI) technologies have been developed for radiation-hardened applications for many years and are rapidly becoming a main-stream commercial technology. The authors review the total dose, single-event effects, and dose rate hardness of SOI devices. The total dose response of SOI devices is more complex than for bulk-silicon devices due to the buried oxide. Radiation-induced trapped charge in the buried oxide can increase the leakage current of partially depleted transistors and decrease the threshold voltage and increase the leakage current of fully depleted transistors. Process techniques that reduce the net amount of radiation-induced positive charge trapped in the buried oxide and device design techniques that mitigate the effects of trapped charge in the buried oxide have been developed to harden SOI devices to bulk-silicon device levels. The sensitive volume for charge collection in SOI technologies is much smaller than for bulk-silicon devices potentially making SOI devices much harder to single-event upset (SEU). However, bipolar amplification caused by floating body effects can significantly reduce the SEU hardness of SOI devices. Body ties are used to reduce floating body effects and improve SEU hardness. SOI ICs are completely immune to classic four-layer p-n-p-n single-event latchup; however, floating body effects make SOI ICs susceptible to single-event snapback (single transistor latch). The sensitive volume for dose rate effects is typically two orders of magnitude lower for SOI devices than for bulk-silicon devices. By using body ties to reduce bipolar amplification, much higher dose rate upset levels can be achieved for SOI devices than for bulk-silicon devices.