Full MIMO Spatial Filtering Approach for Dynamic Range Reduction in Wideband Cognitive Radios
Full MIMO Spatial Filtering Approach for Dynamic Range Reduction in Wideband Cognitive Radios
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用于降低宽带认知无线电动态范围的全 MIMO 空间滤波方法
DOI：
10.1109/tcsi.2012.2189056
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发表时间：
2012
期刊：
影响因子：
--
通讯作者：
D. Cabric
中科院分区：
文献类型：
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作者：
J. V. D. Heuvel;J. Linnartz;P. Baltus;D. Cabric
宽带认知无线电（CR）同时从多个发射机接收信号，以提高频谱利用率。由于接收信号的大动态范围（DR）和ADC所需的高采样速度，处理宽带频谱具有挑战性。高采样速度/高分辨率ADC的功耗对于手持无线电来说是过高的。然而，在CR应用中，由于CR需要检测不存在信号的未使用的频谱带，因此可以滤除造成大DR要求的强带内信号。提出了利用多天线进行空域滤波以降低宽带信号的DR的方法。针对矢量波束成形（多个天线和单个ADC）和全多输入多输出（MIMO）（多个天线，每个天线具有ADC）模拟空间滤波器开发了算法和架构，以用于自适应干扰抑制。仿真结果表明，对于真实的室内传播环境，当接收机工作在2 bits/s/Hz时，模拟波束形成器的ADC分辨率可降低4 bits，ADC功耗降低约90%。此外，仿真表明，当接收机工作在5 bits/s/Hz时，全MIMO模拟空间滤波器可以降低ADC分辨率，每个ADC超过3 bits，降低ADC功耗约85%。
Wideband cognitive radios (CRs) receive signals from multiple transmitters simultaneously to increase spectrum utilization. Processing a wideband spectrum is challenging due to large dynamic range (DR) of the received signal and required high sampling speed of the ADC. The power consumption of high sampling speed/high-resolution ADCs have been prohibitive for handheld radios. However, in CR applications strong inband signals that pose large DR requirements can be filtered out, since CR needs to detect unused spectrum bands where no signal is present. Spatial domain filtering approaches through use of multiple antennas to reduce DR of the wideband signal are proposed. Algorithms and architectures are developed for vector beamforming (multiple antennas and a single ADC) and full multiple-input multiple-output (MIMO) (multiple antennas with an ADC per antenna) analog spatial filters for adaptive interference suppression. Simulation results indicate that for realistic indoor propagation environments the ADC resolution of an analog beamformer can be reduced by 4 bits when the receiver operates at 2 bits/s/Hz, reducing ADC power consumption by approximately 90%. Moreover, simulations indicate that full MIMO analog spatial filter can reduce ADC resolution with over 3 bits per ADC when the receiver operates at 5 bits/s/Hz, reducing ADC power consumption by approximately 85%.