Representation and reasoning of geometric tolerances in design

Representation and reasoning of geometric tolerances in design
复制标题

DOI:
10.1017/s0890060400003255
复制
发表时间:
1997-09
期刊:
Artificial Intelligence for Engineering Design, Analysis and Manufacturing
影响因子:
--
通讯作者:
J. Tsai;M. Cutkosky
J. Tsai;M. Cutkosky
中科院分区:
其他
文献类型:
--
作者:
J. Tsai;M. Cutkosky

文献摘要

被引文献

相似文献

摘要设计的几何尺寸和公差(GD&T)规范与其性能和功能要求直接相关。它们还管理实现这些要求所需的制造和质量控制过程。本文回顾了最近的工作,几何公差表示和推理,并提出了一个通用的和统一的基于图形的表示方案,称为公差网络,代表GD&T规格跨越一个零件或组件。该网络可以适应GD&T与设计规范中嵌入的功能、行为、制造和检验要求相关的规范,并支持使用不同类型的公差。该网络还适应常见的设计实践,如过约束特征和零件的规范。这样一个网络的必要属性进行了讨论,允许下和过约束的设计规范进行检测和分析。
Abstract The geometric dimensioning and tolerancing (GD&T) specifications of a design are directly associated with its performance and functional requirements. They also govern the manufacturing and quality control processes needed to achieve those requirements. This paper reviews recent work in geometric tolerance representation and reasoning and presents a generic and uniform graph-based representation scheme, called the Tolerance Network, to represent GD&T specifications across a part or assembly. The network can accommodate GD&T specifications related to the function, behavior, manufacturing, and inspection requirements embedded in design specifications and supports the use of different types of tolerances. The network also accommodates common design practices such as the specification of overconstrained features and parts. The necessary properties of such a network are discussed that allow under- and overconstrained design specifications to be detected and analyzed.