Power management through DVFS and dynamic body biasing in FD-SOI circuits
Power management through DVFS and dynamic body biasing in FD-SOI circuits
复制标题
通过 FD-SOI 电路中的 DVFS 和动态体偏置进行电源管理
DOI：
10.1145/2593069.2593185
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发表时间：
2014
期刊：
影响因子：
--
通讯作者：
L. Torres
中科院分区：
文献类型：
--
作者：
Y. Akgul;D. Puschini;S. Lesecq;E. Beigné;I. Panades;P. Benoit;L. Torres
与传统的大宗技术相比，新兴的SOI技术提供了更大的身体偏置范围，打开了新的机遇。从电源管理的角度来看，电源电压和时钟频率的变化增加了一个新的自由度，增加了电源优化问题的复杂性。本文提出了一种通过电源偏置电压和主体偏置电压以及时钟频率变化来管理FD-SOI电路功耗的方法。在意法半导体28 nm FD-SOI工艺的数字信号处理器上的测试结果表明，该芯片的功耗缩减率可达17%。
The emerging SOI technologies provide an increased body bias range compared to traditional bulk technologies, opening new opportunities. From the power management perspective, a new degree of freedom is added to the supply voltage and clock frequency variation, increasing the complexity of the power optimization problem. In this paper, a method is proposed to manage the power consumed in an FD-SOI circuit through supply and body bias voltages, and clock frequency variation. Results for a Digital Signal Processor in STMicroelectronics 28nm FD-SOI technology show that the power reduction ratio can reach 17%.