Faster-than-at-speed test for increased test quality and in-field reliability
Faster-than-at-speed test for increased test quality and in-field reliability
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DOI：
10.1109/test.2011.6139131
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发表时间：
2011-09
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通讯作者：
T. Yoneda;Keigo Hori;M. Inoue;H. Fujiwara
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作者：
T. Yoneda;Keigo Hori;M. Inoue;H. Fujiwara
超速测试是筛选小延迟缺陷(SDDS)、提高测试质量和现场可靠性的有效方法。本文提出了一种新的比全速更快的测试框架，以最大限度地减少每个故障的敏化路径的松弛。基本策略是对每个模式使用多个比最快速度更快的测试计时和端点掩码。通过对每个模式中的活动故障和活动端点的敏化路径延迟进行详细分析，我们可以最大限度地减少可检测故障的松弛，同时防止模式计数的大幅增加。我们还提出了在允许松弛大小的约束下最大化敏化路径延迟和进一步减少模式计数的方法，而不是最小化松弛。对ITC‘99基准电路的实验结果表明，该方法在可检测故障的松弛大小和敏化路径延迟、统计延迟质量水平(SDQL)和模式计数方面是有效的。
Faster-than-at-speed testing is an effective approach to screen small delay defects (SDDs) and increase test quality and in-field reliability. This paper presents a novel framework of faster-than-at-speed test to minimize the slack of the sensitized path for each fault. The basic strategy is to use multiple faster-than-at-speed test timings with endpoint masking for each pattern. By performing a detailed analysis of the sensitized path delay for active faults and active endpoints in each pattern, we can minimize the slack for the detectable faults while preventing a large increase in pattern count. We also present methods to maximize the sensitized path delay and further reduce the pattern count under a constraint on the allowable slack size, instead of minimizing the slack. Experimental results for ITC'99 benchmark circuits show the effectiveness of the proposed methods in terms of slack size and sensitized path delay for detectable faults, statistical delay quality level (SDQL) and pattern count.