A general-purpose vision processor with 160×80 pixel-parallel SIMD processor array
A general-purpose vision processor with 160×80 pixel-parallel SIMD processor array
复制标题
具有 160×80 像素并行 SIMD 处理器阵列的通用视觉处理器
DOI：
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发表时间：
2013
期刊：
影响因子：
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通讯作者：
P. Dudek
中科院分区：
文献类型：
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作者：
A. Lopich;P. Dudek
本文介绍了一种采用160×80 SIMD像素处理器阵列的视觉处理器。该处理器采用100 MHz时钟和1.8V电源供电。该器件提供640 GOPS（二进制）和23 GOPS（灰度），消耗0.5 W。该芯片采用标准0.18 μ mCMOS工艺，面积50 mm 2。I/O接口支持200 MPixels/s（灰度）、1.6 GPixels/s（二进制）和40 MPixels/s（地址事件读出）数据速率，以及用于嵌入式高速视觉应用的PE并行图像传感模式。实验结果表明，该芯片的性能接近最近报道的特定应用视觉处理器的效率，同时提供完全的可编程性，因此可以根据广泛的应用进行调整。
In this paper we present a vision processor, which incorporates a 160×80 SIMD array of pixel-processors. The processor operates with a 100MHz clock and 1.8V supply. The device provides 640 GOPS (binary) and 23 GOPS (greyscale) consuming 0.5 W. The chip occupies 50mm2 and is fabricated in a standard 0.18 μm CMOS process. The I/O interface supports 200 MPixels/s (greyscale), 1.6 GPixels/s (binary) and 40 MPixels/s (address-event readout) data rate, and PE-parallel image sensing mode for embedded high-speed vision applications. Experimental results indicate that the performance of the presented chip approaches the efficiency of recently reported application-specific vision processors, while providing full programmability and thus being adjustable to a wide range of applications.