Detection of Crosstalk Faults in Field Programmable Gate Arrays (FPGA)
Detection of Crosstalk Faults in Field Programmable Gate Arrays (FPGA)
复制标题
现场可编程门阵列 (FPGA) 中的串扰故障检测
DOI：
10.1007/s40031-014-0141-9
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发表时间：
2014
影响因子：
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通讯作者：
H. Rahaman
中科院分区：
文献类型：
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作者：
N. Das;P. Roy;H. Rahaman
在这项工作中，提出了一种内置自测试（BIST）技术来检测 FPGA 中的串扰故障和运行时拥塞，并为 FPGA 提供串扰感知路由器。与早期技术相比，所提出的 BIST 电路需要更少的开销。所提出的检测器可以检测由于串扰引起的任何逻辑危险或延迟。还提出了一种通过以互连之间不发生干扰的方式路由路径来避免串扰的技术。与早期的工作相比，所提出的路由器更好地利用了路由资源来确定网络。所提出的方案在 MATLAB 中进行仿真，并使用 Xilinx ISE 工具和 Modelsim 6.0 进行验证。该路由器是使用JBits for Xilinx、Vertex-II FPGA提供的类来实现的。已经发现结果是相当令人鼓舞的。
In this work, a Built-in-Self-Test (BIST) technique has been proposed to detect crosstalk faults in FPGA and run time congestion and to provide the crosstalk aware router for FPGA. The proposed BIST circuits require less overhead as compared to earlier techniques. The proposed detector can detect any logic hazard or delay due to crosstalk. A technique has also been proposed to avoid the crosstalk by routing the path in such a way that no interference occurs between the interconnects. The proposed router has achieved better utilization of routing resource to determine the net as compared to the earlier works. The proposed scheme is simulated in MATLAB and verified using Xilinx ISE tools and Modelsim 6.0. The router is implemented by using class provided by JBits for Xilinx, Vertex-II FPGA. It has been found that the results are quite encouraging.