Loop Tiling in Large-Scale Stencil Codes at Run-Time with OPS

Loop Tiling in Large-Scale Stencil Codes at Run-Time with OPS
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使用 OPS 在运行时在大型模板代码中循环平铺

DOI:
10.1109/tpds.2017.2778161
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发表时间:
2018
影响因子:
5.3
通讯作者:
Reguly I
Reguly I
中科院分区:
计算机科学2区
文献类型:
--
作者:
Reguly I

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大多数模板代码中的关键常见瓶颈是数据移动,先前的研究表明,通过跨循环优化的优化来改善数据局部性效果特别好。然而,在许多大型PDE应用程序中,不可能通过编译器应用这种优化,因为有许多选项、执行路径和每个网格点的数据,其中许多依赖于运行时参数,并且代码分布在不同的编译单元中。在本文中,我们根据运行时分析和延迟执行,将数据局部性改进优化称为平铺,以用于共享内存和分布式内存系统中的大型OPS应用程序。我们在许多应用程序上对我们的方法进行了评估,在立体式2D/3D代理应用程序上观察到了2倍的加速比,其中包含83(2D)/141(3D)循环,在线性求解器TeaLeaf上加速3.5倍,在可压缩的Navier-Stokes求解器OpenSBLI上加速1.7倍。我们在CINECA的Marconi超级计算机上展示了高达4608核的强可伸缩性和弱可伸缩性。我们还在Intel的Knights Landing上对我们的算法进行了评估,演示了在问题大小超过16 GB时保持的吞吐量,并进行了高达8704个内核的扩展研究。该方法通常适用于提供每个循环嵌套数据访问信息的任何模板DSL。
The key common bottleneck in most stencil codes is data movement, and prior research has shown that improving data locality through optimisations that optimise across loops do particularly well. However, in many large PDE applications it is not possible to apply such optimisations through compilers because there are many options, execution paths and data per grid point, many dependent on run-time parameters, and the code is distributed across different compilation units. In this paper, we adapt the data locality improving optimisation called tiling for use in large OPS applications both in shared-memory and distributed-memory systems, relying on run-time analysis and delayed execution. We evaluate our approach on a number of applications, observing speedups of 2× on the Cloverleaf 2D/3D proxy applications, which contain 83(2D)/141(3D) loops, 3.5× on the linear solver TeaLeaf, and 1.7× on the compressible Navier-Stokes solver OpenSBLI. We demonstrate strong and weak scalability on up to 4608 cores of CINECA's Marconi supercomputer. We also evaluate our algorithms on Intel's Knights Landing, demonstrating maintained throughput as the problem size grows beyond 16GB, and we do scaling studies up to 8704 cores. The approach is generally applicable to any stencil DSL that provides per loop nest data access information.
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