LVI: Hijacking Transient Execution through Microarchitectural Load Value Injection
LVI: Hijacking Transient Execution through Microarchitectural Load Value Injection
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DOI：
10.1109/sp40000.2020.00089
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发表时间：
2020-05
期刊：
影响因子：
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通讯作者：
Jo Van Bulck;D. Moghimi;Michael Schwarz;Moritz Lipp;Marina Minkin;Daniel Genkin;Y. Yarom;B. Sunar-B.-Su
中科院分区：
文献类型：
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作者：
Jo Van Bulck;D. Moghimi;Michael Schwarz;Moritz Lipp;Marina Minkin;Daniel Genkin;Y. Yarom;B. Sunar-B.-Su
最近的幽灵攻击首先显示了如何通过中毒微体系分支的预测历史记录到受害者领域，我们将基于注射的方法推广到记忆层次结构中受害者的瞬态执行。泄漏。滥用合法受害者计划的断层或辅助负载可能会暂时使用虚拟值或来自各种微体系缓冲区的中毒数据，然后最终被处理器重新发行。受害者的秘密和劫持瞬态控制流程。对传统的用户过程和内核隔离的影响我们的攻击需要在可能的每个内存负载之后使用LFENCE指令序列化管道。负载，必须将某些指令列入黑名单，包括无处不在的X86 RET指令。我们观察到因子2至19的广泛间接开销，以实现全面缓解的原型。
The recent Spectre attack first showed how to inject incorrect branch targets into a victim domain by poisoning microarchitectural branch prediction history. In this paper, we generalize injection-based methodologies to the memory hierarchy by directly injecting incorrect, attacker-controlled values into a victim’s transient execution. We propose Load Value Injection (LVI) as an innovative technique to reversely exploit Meltdown-type microarchitectural data leakage. LVI abuses that faulting or assisted loads, executed by a legitimate victim program, may transiently use dummy values or poisoned data from various microarchitectural buffers, before eventually being re-issued by the processor. We show how LVI gadgets allow to expose victim secrets and hijack transient control flow. We practically demonstrate LVI in several proof-of-concept attacks against Intel SGX enclaves, and we discuss implications for traditional user process and kernel isolation. State-of-the-art Meltdown and Spectre defenses, including widespread silicon-level and microcode mitigations, are orthogonal to our novel LVI techniques. LVI drastically widens the spectrum of incorrect transient paths. Fully mitigating our attacks requires serializing the processor pipeline with lfence instructions after possibly every memory load. Additionally and even worse, due to implicit loads, certain instructions have to be blacklisted, including the ubiquitous x86 ret instruction. Intel plans compiler and assembler-based full mitigations that will allow at least SGX enclave programs to remain secure on LVI-vulnerable systems. Depending on the application and optimization strategy, we observe extensive overheads of factor 2 to 19 for prototype implementations of the full mitigation.