An integrated CoolMOS FET/SiC diode module for high performance power switching
An integrated CoolMOS FET/SiC diode module for high performance power switching
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用于高性能电源开关的集成 CoolMOS FET/SiC 二极管模块
DOI：
10.1109/tpel.2005.846547
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发表时间：
2005
期刊：
影响因子：
--
通讯作者：
F. Lee
中科院分区：
文献类型：
--
作者：
Zhenxian Liang;B. Lu;J. D. van Wyk;F. Lee
用于功率因数校正（PFC）应用的Si CoolMOS FET和SiC二极管组件具有升压配置的栅极驱动器（额定值为600 V/12 A），已在IPEM -集成电力电子模块的版本中制造。它采用所谓的嵌入式电源（EP）技术，形成具有功能集成和高性能的三维（3-D）多芯片/组件互连。集成电源芯片平台是通过将芯片嵌入共面陶瓷衬底并在其上建立金属化薄膜互连而构建的。这种沉积的金属化不仅可以粘合电源芯片，还可以提供第二级互连布线，以便从顶部和底部安装相关组件和基板。本文对该模块的开关参数及其对变换器性能的影响进行了实验表征。介绍了平面金属化、互连和焊料堆积的工艺流程。除了结构电性能的改善，与传统的离散版本相比，平面工艺集成的特点也得到了证明。
A Si CoolMOS FET and SiC diode assembly with gate driver in boost configuration (ratings at 600 V/12 A), for power factor correction (PFC) application, has been fabricated in a version of IPEM - integrated power electronics module. It uses technology of so-called embedded power (EP), to form a three-dimensional (3-D) multiple chips/components interconnection with the capability of functional integration and high performance. An integrated power chip stage is built by embedding chips in a co-planar ceramic substrate and building up onto it a metallization thin-film interconnection. This deposited metallization not only bonds the power chips, but also provides the second-level interconnect wiring, so that associated components and base substrate are mounted from top and bottom sides. In this paper, the switching parameters of this module and their effects on a converter's performance have been experimentally characterized. The procedures adopted for the defined fabrication processes of planar metallization interconnecting and solder stacking, are presented. In addition to the improvement of structural electrical properties, compared to a conventional discrete version, the characteristics of the planar process integration have also been demonstrated.