Monolithic pixel development in TowerJazz 180nm CMOS for the outer pixel layers in the ATLAS experiment

Monolithic pixel development in TowerJazz 180nm CMOS for the outer pixel layers in the ATLAS experiment
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DOI:
10.1088/1748-0221/13/01/c01023
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发表时间:
2018-01-01
影响因子:
1.3
通讯作者:
Wermes, N.
Wermes, N.
中科院分区:
工程技术4区
文献类型:
--
作者:
Berdalovic, I.;Bates, R.;Wermes, N.

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欧洲核子研究中心高亮度大型强子对撞机ATLAS跟踪探测器(ITK)的升级需要发展新的辐射硬硅传感器技术。CMOS传感器工艺的最新发展提供了将高阻衬底与片上高压偏置相结合以实现大量耗尽的有源传感器体积的可能性。我们已经表征了耗尽的单片有源像素传感器(DMAPS),它是在为Alice实验开发的单片传感器的框架内,在TowerJazz 180 nm CMOS工艺中实施的一种新的改进成像工艺中产生的。用这种改进的工艺制造的传感器具有敏感层完全耗尽,传感器电容仅为几个Ff,辐射容限高达10(15)N(Eq)/cm(2)的特点。本文总结了在束流测试和实验室中使用放射源和边缘TCT进行的电荷收集特性的测量。这些测量的结果表明,使用改进的工艺制造的传感器获得了显著的辐射硬度改善。这为ATLAS ITK的两个大型演示器的设计开辟了道路。为了实现与跟踪器外部像素层的要求兼容的设计,将1.8V电源电压为500 nA的电荷敏感前端与快速数字读出架构相结合。低功耗前端具有25 ns的时间分辨率,利用低传感器电容来降低噪声和模拟功耗,而所实现的读出架构通过减少数字活动来将功耗降至最低。
The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 10(15) n(eq)/cm(2).This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.