Diagnosis and Layout Aware (DLA) scan chain stitching-猫眼课题宝

DOI：

10.1109/tvlsi.2014.2313563

发表时间：

2013-11

期刊：

2013 IEEE International Test Conference (ITC)

影响因子：

通讯作者：

中科院分区：

其他

文献类型：

作者：

Jing Ye;Yu Huang;Yu Hu;Wu-Tung Cheng;Ruifeng Guo;Liyang Lai;Ting-Pu Tai;Xiaowei Li;Wei-pin Changchien;Daw-Ming Lee;Ji-Jan Chen;Sandeep C. Eruvathi;K. K. Kumara-K.;Charles C. C. Liu-Charles-C.-C.-Liu-2107909133;Sam Pan

如果没有适当的扫描链拼接，即使有良好的诊断算法和诊断模式生成，它仍然可能导致坏的扫描链诊断分辨率。为了提高诊断分辨率，我们提出了一种新的诊断和布局感知（DLA）扫描链拼接方法，这是模式无关的，并支持嵌入式扫描压缩。它基于三个想法：（1）增加敏感扫描单元的数量，这可以捕获有用的诊断信息;（2）沿着扫描链适当地分布敏感扫描单元，以提高整体分辨率;（3）基于布局的布局拼接扫描单元，以保持芯片性能。在ISCAS'89/ITC'99基准电路和一个基于20 nm工艺的真实的工业电路上的实验结果表明，所提出的DLA扫描链拼接方法有效地提高了分辨率，而对芯片性能、嵌入式扫描压缩、转换故障覆盖率和测试功耗的影响很小。与不使用所提出的方法相比，硅结果甚至显示出7倍的平均分辨率提高。

Without appropriate stitching of scan chains, even with good diagnosis algorithm and diagnostic pattern generation, it may still result in bad scan chain diagnostic resolution. To improve the diagnostic resolution, we propose a novel Diagnosis and Layout Aware (DLA) scan chain stitching method, which is pattern independent and supports embedded scan compaction. It is based on three ideas: (1) increasing the number of sensitive scan cells, which can capture useful diagnostic information; (2) properly distributing the sensitive scan cells along the scan chains to enhance the overall resolution; (3) stitching scan cells based on their placement at layout to preserve the chip performance. Experiments on ISCAS'89/ITC'99 benchmark circuits and a real industry circuit based on 20nm technology with silicon results show that, the proposed DLA scan chain stitching method effectively improves the resolution, with negligible impact on chip performance, embedded scan compaction, transition fault coverage, and test power dissipation. The silicon results even show 7X average resolution improvement comparing to without using the proposed method.

Diagnosis and Layout Aware (DLA) scan chain stitching

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