Considerations Surrounding Single Event Effects in FPGAs, ASICs, and Processors
Considerations Surrounding Single Event Effects in FPGAs, ASICs, and Processors
复制标题
围绕 FPGA、ASIC 和处理器中的单粒子效应的注意事项
DOI:
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发表时间:
2011
期刊:
影响因子:
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通讯作者:
D. White
中科院分区:
文献类型:
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作者:
D. White
Single event effects (SEEs) are of a growing concern in high-reliability system development, yet there is much disparity among users of ASICs and FPGAs with regard to understanding how susceptible their designs might be. The avionics and industrial system development guidance that currently exists is only broadly beginning to consider SEEs and their impact on system reliability. Unfortunately, standards such as DO-254, DO-178, ARP 4754, ARP 4761, and IEC 61508 provide little or no guidance on how to handle SEEs. This white paper highlights concerns regarding effects of SEEs on ASICs and FPGAs and points to analysis and mitigation techniques for handling SEEs.