Considerations Surrounding Single Event Effects in FPGAs, ASICs, and Processors

Considerations Surrounding Single Event Effects in FPGAs, ASICs, and Processors
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围绕 FPGA、ASIC 和处理器中的单粒子效应的注意事项

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发表时间:
2011
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影响因子:
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通讯作者:
D. White
D. White
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文献类型:
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作者:
D. White

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单粒子效应(SEE)在高可靠性系统开发中越来越受到关注,但ASIC和FPGA的用户在理解其设计可能受到的影响方面存在很大差异。目前存在的航空电子和工业系统开发指南只是广泛地开始考虑SEE及其对系统可靠性的影响。不幸的是,诸如DO-254、DO-178、阿普4754、阿普4761和IEC 61508等标准很少或根本没有提供关于如何处理SEE的指导。这份白色文件强调了关于SEE对ASIC和FPGA影响的关注,并指出了处理SEE的分析和缓解技术。
Single event effects (SEEs) are of a growing concern in high-reliability system development, yet there is much disparity among users of ASICs and FPGAs with regard to understanding how susceptible their designs might be. The avionics and industrial system development guidance that currently exists is only broadly beginning to consider SEEs and their impact on system reliability. Unfortunately, standards such as DO-254, DO-178, ARP 4754, ARP 4761, and IEC 61508 provide little or no guidance on how to handle SEEs. This white paper highlights concerns regarding effects of SEEs on ASICs and FPGAs and points to analysis and mitigation techniques for handling SEEs.