The TaPaSCo Open-Source Toolflow
The TaPaSCo Open-Source Toolflow
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TaPaSCo 开源工具流程
DOI：
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发表时间：
2021
期刊：
影响因子：
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通讯作者：
A. Koch
中科院分区：
文献类型：
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作者：
Carsten Heinz;Jaco A. Hofmann;Jens Korinth;Lukas Sommer;Lukas Weber;A. Koch
将基于fpga的加速器集成到一个完整的异构系统中是许多研究人员和工程师面临的一项具有挑战性的任务，特别是现在fpga作为信号处理、机器学习和智能存储等领域的高效、特定应用加速器的实现平台越来越受欢迎。为了减轻加速器开发人员的系统集成负担，本工作中提出的开源TaPaSCo框架提供了一个自动化的工具流，用于从自定义处理元素构建异构多核架构，以及一个简单，统一的编程接口，用于在fpga上利用空间分布，并行计算。TaPaSCo旨在通过自动化设计空间探索来提高FPGA设计的可扩展性和可移植性，极大地简化了硬件设计的扩展，促进了FPGA设备和系列之间的迭代增长和可移植性。这项工作描述了TaPaSCo及其主要设计抽象，并展示了TaPaSCo如何解决片上系统的FPGA硬件设计的可移植性和可扩展性。对使用TaPaSCo的成功项目的研究显示了它的多功能性，可以为未来的用户提供灵感和参考，在深入的案例研究和工作流程的简短概述中提供了更多关于TaPaSCo使用的细节。
The integration of FPGA-based accelerators into a complete heterogeneous system is a challenging task faced by many researchers and engineers, especially now that FPGAs enjoy increasing popularity as implementation platforms for efficient, application-specific accelerators for domains such as signal processing, machine learning and intelligent storage. To lighten the burden of system integration from the developers of accelerators, the open-source TaPaSCo framework presented in this work provides an automated toolflow for the construction of heterogeneous many-core architectures from custom processing elements, and a simple, uniform programming interface to utilize spatially distributed, parallel computation on FPGAs. TaPaSCo aims to increase the scalability and portability of FPGA designs through automated design space exploration, greatly simplifying the scaling of hardware designs and facilitating iterative growth and portability across FPGA devices and families. This work describes TaPaSCo with its primary design abstractions and shows how TaPaSCo addresses portability and extensibility of FPGA hardware designs for systems-on-chip. A study of successful projects using TaPaSCo shows its versatility and can serve as inspiration and reference for future users, with more details on the usage of TaPaSCo presented in an in-depth case study and a short overview of the workflow.