iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks
iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks
复制标题
DOI：
10.1109/tcad.2023.3276525
复制
发表时间：
2023-12
影响因子：
2.9
通讯作者：
Minyan Gao;M. S. Rahman;Nitin Varshney;M. Tehranipoor;Domenic Forte
中科院分区：
文献类型：
--
作者：
Minyan Gao;M. S. Rahman;Nitin Varshney;M. Tehranipoor;Domenic Forte
聚焦离子束（FIB）已成为过去十年中最流行的集成电路（IC）编辑技术之一，极大地帮助了硅后调试和故障分析。然而，电子设备上的安全资产的机密性受到基于FIB的探测攻击的严重威胁，因为FIB在硅芯片上的细粒度研磨和沉积能力。尽管已经提出了许多解决方案，例如主动屏蔽和模拟传感器，但是它们要么招致过高的开销，要么遭受低可靠性，无法以可行的方式提供针对这种威胁的保护。在这篇文章中，我们提出了一个FIB感知框架，iPROBE，作为一组计算机辅助设计（CAD）工具，以量化FIB攻击的威胁，从正面和背面的目标布局在前硅阶段。随后的屏蔽网/层布局和布线由iPROBE完全自动化，以最大限度地减少量化的FIB漏洞度量，即所谓的暴露面积（EA），使用户能够以最小的性能下降、额外的设计工作和时间消耗为代价实现最佳的安全级别。我们的实验结果表明，EA的安全关键网，即，在低FIB纵横比下，物理布局内的易受攻击区域可以完全消除正面和背面探测攻击，仅需3%的时序和面积开销。此外，我们通过FIB实验验证的结果在一个制造的测试芯片，涵盖基线和iPROBE保护的AES实现在65纳米技术节点，进一步证明了iPROBE的有效性。
Focused ion beam (FIB) has emerged as one of the most prevalent integrated circuit (IC) editing techniques in the past decade, greatly assisting post-silicon debugging and failure analysis. However, the confidentiality of security assets on electronic devices is gravely threatened by FIB-based probing attacks because of the FIB’s fine-grained milling and deposition capabilities on silicon die. Although numerous solutions, such as active shields and analog sensors have been proposed, they either incur prohibitively high overhead or suffer from low reliability, failing to provide protection against such threats in a feasible manner. In this article, we propose a FIB-aware framework, iPROBE, as a set of computer-aided design (CAD) utilities to quantify the threats of FIB attacks on the target layout from both front-side and back-side at the pre-silicon stage. The subsequent shield nets/layer place-and-route are completely automated by iPROBE to minimize the quantified FIB vulnerability metric, so-called exposed area (EA), allowing users to achieve the optimal security level at a cost of minimal performance degradation, extra design efforts, and time consumption. Our experimental results show that the EA of security-critical nets, i.e., vulnerable regions inside the physical layout, to front-side and back-side probing attacks can be fully eliminated at low FIB aspect ratios with only 3% timing and area overhead. Moreover, we validate the results through the FIB experiments on a fabricated test chip covering both baseline and iPROBE-protected AES implementations at 65nm technology node, further demonstrating the effectiveness of iPROBE.